texture.h 6.3 KB

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  1. // Copyright 2018 yuzu Emulator Project
  2. // Licensed under GPLv2 or any later version
  3. // Refer to the license.txt file included.
  4. #pragma once
  5. #include "common/assert.h"
  6. #include "common/bit_field.h"
  7. #include "common/common_funcs.h"
  8. #include "common/common_types.h"
  9. #include "video_core/memory_manager.h"
  10. namespace Tegra::Texture {
  11. enum class TextureFormat : u32 {
  12. R32_G32_B32_A32 = 0x01,
  13. R32_G32_B32 = 0x02,
  14. R16_G16_B16_A16 = 0x03,
  15. R32_G32 = 0x04,
  16. R32_B24G8 = 0x05,
  17. ETC2_RGB = 0x06,
  18. X8B8G8R8 = 0x07,
  19. A8R8G8B8 = 0x08,
  20. A2B10G10R10 = 0x09,
  21. ETC2_RGB_PTA = 0x0a,
  22. ETC2_RGBA = 0x0b,
  23. R16_G16 = 0x0c,
  24. G8R24 = 0x0d,
  25. G24R8 = 0x0e,
  26. R32 = 0x0f,
  27. BC6H_SF16 = 0x10,
  28. BC6H_UF16 = 0x11,
  29. A4B4G4R4 = 0x12,
  30. A5B5G5R1 = 0x13,
  31. A1B5G5R5 = 0x14,
  32. B5G6R5 = 0x15,
  33. B6G5R5 = 0x16,
  34. BC7U = 0x17,
  35. G8R8 = 0x18,
  36. EAC = 0x19,
  37. EACX2 = 0x1a,
  38. R16 = 0x1b,
  39. Y8_VIDEO = 0x1c,
  40. R8 = 0x1d,
  41. G4R4 = 0x1e,
  42. R1 = 0x1f,
  43. E5B9G9R9_SHAREDEXP = 0x20,
  44. BF10GF11RF11 = 0x21,
  45. G8B8G8R8 = 0x22,
  46. B8G8R8G8 = 0x23,
  47. DXT1 = 0x24,
  48. DXT23 = 0x25,
  49. DXT45 = 0x26,
  50. DXN1 = 0x27,
  51. DXN2 = 0x28,
  52. Z24S8 = 0x29,
  53. X8Z24 = 0x2a,
  54. S8Z24 = 0x2b,
  55. X4V4Z24__COV4R4V = 0x2c,
  56. X4V4Z24__COV8R8V = 0x2d,
  57. V8Z24__COV4R12V = 0x2e,
  58. ZF32 = 0x2f,
  59. ZF32_X24S8 = 0x30,
  60. X8Z24_X20V4S8__COV4R4V = 0x31,
  61. X8Z24_X20V4S8__COV8R8V = 0x32,
  62. ZF32_X20V4X8__COV4R4V = 0x33,
  63. ZF32_X20V4X8__COV8R8V = 0x34,
  64. ZF32_X20V4S8__COV4R4V = 0x35,
  65. ZF32_X20V4S8__COV8R8V = 0x36,
  66. X8Z24_X16V8S8__COV4R12V = 0x37,
  67. ZF32_X16V8X8__COV4R12V = 0x38,
  68. ZF32_X16V8S8__COV4R12V = 0x39,
  69. Z16 = 0x3a,
  70. V8Z24__COV8R24V = 0x3b,
  71. X8Z24_X16V8S8__COV8R24V = 0x3c,
  72. ZF32_X16V8X8__COV8R24V = 0x3d,
  73. ZF32_X16V8S8__COV8R24V = 0x3e,
  74. ASTC_2D_4X4 = 0x40,
  75. ASTC_2D_5X5 = 0x41,
  76. ASTC_2D_6X6 = 0x42,
  77. ASTC_2D_8X8 = 0x44,
  78. ASTC_2D_10X10 = 0x45,
  79. ASTC_2D_12X12 = 0x46,
  80. ASTC_2D_5X4 = 0x50,
  81. ASTC_2D_6X5 = 0x51,
  82. ASTC_2D_8X6 = 0x52,
  83. ASTC_2D_10X8 = 0x53,
  84. ASTC_2D_12X10 = 0x54,
  85. ASTC_2D_8X5 = 0x55,
  86. ASTC_2D_10X5 = 0x56,
  87. ASTC_2D_10X6 = 0x57,
  88. };
  89. enum class TextureType : u32 {
  90. Texture1D = 0,
  91. Texture2D = 1,
  92. Texture3D = 2,
  93. TextureCubemap = 3,
  94. Texture1DArray = 4,
  95. Texture2DArray = 5,
  96. Texture1DBuffer = 6,
  97. Texture2DNoMipmap = 7,
  98. TextureCubeArray = 8,
  99. };
  100. enum class TICHeaderVersion : u32 {
  101. OneDBuffer = 0,
  102. PitchColorKey = 1,
  103. Pitch = 2,
  104. BlockLinear = 3,
  105. BlockLinearColorKey = 4,
  106. };
  107. enum class ComponentType : u32 {
  108. SNORM = 1,
  109. UNORM = 2,
  110. SINT = 3,
  111. UINT = 4,
  112. SNORM_FORCE_FP16 = 5,
  113. UNORM_FORCE_FP16 = 6,
  114. FLOAT = 7
  115. };
  116. enum class SwizzleSource : u32 {
  117. Zero = 0,
  118. R = 2,
  119. G = 3,
  120. B = 4,
  121. A = 5,
  122. OneInt = 6,
  123. OneFloat = 7,
  124. };
  125. union TextureHandle {
  126. u32 raw;
  127. BitField<0, 20, u32> tic_id;
  128. BitField<20, 12, u32> tsc_id;
  129. };
  130. static_assert(sizeof(TextureHandle) == 4, "TextureHandle has wrong size");
  131. struct TICEntry {
  132. static constexpr u32 DefaultBlockHeight = 16;
  133. union {
  134. u32 raw;
  135. BitField<0, 7, TextureFormat> format;
  136. BitField<7, 3, ComponentType> r_type;
  137. BitField<10, 3, ComponentType> g_type;
  138. BitField<13, 3, ComponentType> b_type;
  139. BitField<16, 3, ComponentType> a_type;
  140. BitField<19, 3, SwizzleSource> x_source;
  141. BitField<22, 3, SwizzleSource> y_source;
  142. BitField<25, 3, SwizzleSource> z_source;
  143. BitField<28, 3, SwizzleSource> w_source;
  144. };
  145. u32 address_low;
  146. union {
  147. BitField<0, 16, u32> address_high;
  148. BitField<21, 3, TICHeaderVersion> header_version;
  149. };
  150. union {
  151. BitField<3, 3, u32> block_height;
  152. // High 16 bits of the pitch value
  153. BitField<0, 16, u32> pitch_high;
  154. };
  155. union {
  156. BitField<0, 16, u32> width_minus_1;
  157. BitField<23, 4, TextureType> texture_type;
  158. };
  159. union {
  160. BitField<0, 16, u32> height_minus_1;
  161. BitField<16, 15, u32> depth_minus_1;
  162. };
  163. INSERT_PADDING_BYTES(8);
  164. GPUVAddr Address() const {
  165. return static_cast<GPUVAddr>((static_cast<GPUVAddr>(address_high) << 32) | address_low);
  166. }
  167. u32 Pitch() const {
  168. ASSERT(header_version == TICHeaderVersion::Pitch ||
  169. header_version == TICHeaderVersion::PitchColorKey);
  170. // The pitch value is 21 bits, and is 32B aligned.
  171. return pitch_high << 5;
  172. }
  173. u32 Width() const {
  174. return width_minus_1 + 1;
  175. }
  176. u32 Height() const {
  177. return height_minus_1 + 1;
  178. }
  179. u32 Depth() const {
  180. return depth_minus_1 + 1;
  181. }
  182. u32 BlockHeight() const {
  183. ASSERT(header_version == TICHeaderVersion::BlockLinear ||
  184. header_version == TICHeaderVersion::BlockLinearColorKey);
  185. // The block height is stored in log2 format.
  186. return 1 << block_height;
  187. }
  188. bool IsTiled() const {
  189. return header_version == TICHeaderVersion::BlockLinear ||
  190. header_version == TICHeaderVersion::BlockLinearColorKey;
  191. }
  192. };
  193. static_assert(sizeof(TICEntry) == 0x20, "TICEntry has wrong size");
  194. enum class WrapMode : u32 {
  195. Wrap = 0,
  196. Mirror = 1,
  197. ClampToEdge = 2,
  198. Border = 3,
  199. ClampOGL = 4,
  200. MirrorOnceClampToEdge = 5,
  201. MirrorOnceBorder = 6,
  202. MirrorOnceClampOGL = 7,
  203. };
  204. enum class TextureFilter : u32 {
  205. Nearest = 1,
  206. Linear = 2,
  207. };
  208. enum class TextureMipmapFilter : u32 {
  209. None = 1,
  210. Nearest = 2,
  211. Linear = 3,
  212. };
  213. struct TSCEntry {
  214. union {
  215. BitField<0, 3, WrapMode> wrap_u;
  216. BitField<3, 3, WrapMode> wrap_v;
  217. BitField<6, 3, WrapMode> wrap_p;
  218. BitField<9, 1, u32> depth_compare_enabled;
  219. BitField<10, 3, u32> depth_compare_func;
  220. };
  221. union {
  222. BitField<0, 2, TextureFilter> mag_filter;
  223. BitField<4, 2, TextureFilter> min_filter;
  224. BitField<6, 2, TextureMipmapFilter> mip_filter;
  225. };
  226. INSERT_PADDING_BYTES(8);
  227. float border_color_r;
  228. float border_color_g;
  229. float border_color_b;
  230. float border_color_a;
  231. };
  232. static_assert(sizeof(TSCEntry) == 0x20, "TSCEntry has wrong size");
  233. struct FullTextureInfo {
  234. u32 index;
  235. TICEntry tic;
  236. TSCEntry tsc;
  237. bool enabled;
  238. };
  239. /// Returns the number of bytes per pixel of the input texture format.
  240. u32 BytesPerPixel(TextureFormat format);
  241. } // namespace Tegra::Texture