cdma_pusher.cpp 6.0 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152
  1. // MIT License
  2. //
  3. // Copyright (c) Ryujinx Team and Contributors
  4. //
  5. // Permission is hereby granted, free of charge, to any person obtaining a copy of this software and
  6. // associated documentation files (the "Software"), to deal in the Software without restriction,
  7. // including without limitation the rights to use, copy, modify, merge, publish, distribute,
  8. // sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is
  9. // furnished to do so, subject to the following conditions:
  10. //
  11. // The above copyright notice and this permission notice shall be included in all copies or
  12. // substantial portions of the Software.
  13. //
  14. // THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT
  15. // NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  16. // NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
  17. // DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  18. // OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  19. //
  20. #include <bit>
  21. #include "command_classes/host1x.h"
  22. #include "command_classes/nvdec.h"
  23. #include "command_classes/vic.h"
  24. #include "video_core/cdma_pusher.h"
  25. #include "video_core/command_classes/nvdec_common.h"
  26. #include "video_core/engines/maxwell_3d.h"
  27. #include "video_core/gpu.h"
  28. #include "video_core/memory_manager.h"
  29. namespace Tegra {
  30. CDmaPusher::CDmaPusher(GPU& gpu_)
  31. : gpu{gpu_}, nvdec_processor(std::make_shared<Nvdec>(gpu)),
  32. vic_processor(std::make_unique<Vic>(gpu, nvdec_processor)),
  33. host1x_processor(std::make_unique<Host1x>(gpu)),
  34. sync_manager(std::make_unique<SyncptIncrManager>(gpu)) {}
  35. CDmaPusher::~CDmaPusher() = default;
  36. void CDmaPusher::ProcessEntries(ChCommandHeaderList&& entries) {
  37. for (const auto& value : entries) {
  38. if (mask != 0) {
  39. const auto lbs = static_cast<u32>(std::countr_zero(mask));
  40. mask &= ~(1U << lbs);
  41. ExecuteCommand(offset + lbs, value.raw);
  42. continue;
  43. } else if (count != 0) {
  44. --count;
  45. ExecuteCommand(offset, value.raw);
  46. if (incrementing) {
  47. ++offset;
  48. }
  49. continue;
  50. }
  51. const auto mode = value.submission_mode.Value();
  52. switch (mode) {
  53. case ChSubmissionMode::SetClass: {
  54. mask = value.value & 0x3f;
  55. offset = value.method_offset;
  56. current_class = static_cast<ChClassId>((value.value >> 6) & 0x3ff);
  57. break;
  58. }
  59. case ChSubmissionMode::Incrementing:
  60. case ChSubmissionMode::NonIncrementing:
  61. count = value.value;
  62. offset = value.method_offset;
  63. incrementing = mode == ChSubmissionMode::Incrementing;
  64. break;
  65. case ChSubmissionMode::Mask:
  66. mask = value.value;
  67. offset = value.method_offset;
  68. break;
  69. case ChSubmissionMode::Immediate: {
  70. const u32 data = value.value & 0xfff;
  71. offset = value.method_offset;
  72. ExecuteCommand(offset, data);
  73. break;
  74. }
  75. default:
  76. UNIMPLEMENTED_MSG("ChSubmission mode {} is not implemented!", static_cast<u32>(mode));
  77. break;
  78. }
  79. }
  80. }
  81. void CDmaPusher::ExecuteCommand(u32 state_offset, u32 data) {
  82. switch (current_class) {
  83. case ChClassId::NvDec:
  84. ThiStateWrite(nvdec_thi_state, offset, data);
  85. switch (static_cast<ThiMethod>(offset)) {
  86. case ThiMethod::IncSyncpt: {
  87. LOG_DEBUG(Service_NVDRV, "NVDEC Class IncSyncpt Method");
  88. const auto syncpoint_id = static_cast<u32>(data & 0xFF);
  89. const auto cond = static_cast<u32>((data >> 8) & 0xFF);
  90. if (cond == 0) {
  91. sync_manager->Increment(syncpoint_id);
  92. } else {
  93. sync_manager->SignalDone(
  94. sync_manager->IncrementWhenDone(static_cast<u32>(current_class), syncpoint_id));
  95. }
  96. break;
  97. }
  98. case ThiMethod::SetMethod1:
  99. LOG_DEBUG(Service_NVDRV, "NVDEC method 0x{:X}",
  100. static_cast<u32>(nvdec_thi_state.method_0));
  101. nvdec_processor->ProcessMethod(nvdec_thi_state.method_0, data);
  102. break;
  103. default:
  104. break;
  105. }
  106. break;
  107. case ChClassId::GraphicsVic:
  108. ThiStateWrite(vic_thi_state, static_cast<u32>(state_offset), {data});
  109. switch (static_cast<ThiMethod>(state_offset)) {
  110. case ThiMethod::IncSyncpt: {
  111. LOG_DEBUG(Service_NVDRV, "VIC Class IncSyncpt Method");
  112. const auto syncpoint_id = static_cast<u32>(data & 0xFF);
  113. const auto cond = static_cast<u32>((data >> 8) & 0xFF);
  114. if (cond == 0) {
  115. sync_manager->Increment(syncpoint_id);
  116. } else {
  117. sync_manager->SignalDone(
  118. sync_manager->IncrementWhenDone(static_cast<u32>(current_class), syncpoint_id));
  119. }
  120. break;
  121. }
  122. case ThiMethod::SetMethod1:
  123. LOG_DEBUG(Service_NVDRV, "VIC method 0x{:X}, Args=({})",
  124. static_cast<u32>(vic_thi_state.method_0), data);
  125. vic_processor->ProcessMethod(static_cast<Vic::Method>(vic_thi_state.method_0), data);
  126. break;
  127. default:
  128. break;
  129. }
  130. break;
  131. case ChClassId::Host1x:
  132. // This device is mainly for syncpoint synchronization
  133. LOG_DEBUG(Service_NVDRV, "Host1X Class Method");
  134. host1x_processor->ProcessMethod(static_cast<Host1x::Method>(offset), data);
  135. break;
  136. default:
  137. UNIMPLEMENTED_MSG("Current class not implemented {:X}", static_cast<u32>(current_class));
  138. break;
  139. }
  140. }
  141. void CDmaPusher::ThiStateWrite(ThiRegisters& state, u32 state_offset, u32 argument) {
  142. u8* const offset_ptr = reinterpret_cast<u8*>(&state) + sizeof(u32) * state_offset;
  143. std::memcpy(offset_ptr, &argument, sizeof(u32));
  144. }
  145. } // namespace Tegra