collect_shader_info_pass.cpp 26 KB

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  1. // Copyright 2021 yuzu Emulator Project
  2. // Licensed under GPLv2 or any later version
  3. // Refer to the license.txt file included.
  4. #include "shader_recompiler/environment.h"
  5. #include "shader_recompiler/frontend/ir/microinstruction.h"
  6. #include "shader_recompiler/frontend/ir/modifiers.h"
  7. #include "shader_recompiler/frontend/ir/program.h"
  8. #include "shader_recompiler/ir_opt/passes.h"
  9. #include "shader_recompiler/shader_info.h"
  10. namespace Shader::Optimization {
  11. namespace {
  12. void AddConstantBufferDescriptor(Info& info, u32 index, u32 count) {
  13. if (count != 1) {
  14. throw NotImplementedException("Constant buffer descriptor indexing");
  15. }
  16. if ((info.constant_buffer_mask & (1U << index)) != 0) {
  17. return;
  18. }
  19. info.constant_buffer_mask |= 1U << index;
  20. auto& cbufs{info.constant_buffer_descriptors};
  21. cbufs.insert(std::ranges::lower_bound(cbufs, index, {}, &ConstantBufferDescriptor::index),
  22. ConstantBufferDescriptor{
  23. .index = index,
  24. .count = 1,
  25. });
  26. }
  27. void GetAttribute(Info& info, IR::Attribute attribute) {
  28. if (IR::IsGeneric(attribute)) {
  29. info.input_generics.at(IR::GenericAttributeIndex(attribute)).used = true;
  30. return;
  31. }
  32. switch (attribute) {
  33. case IR::Attribute::PrimitiveId:
  34. info.loads_primitive_id = true;
  35. break;
  36. case IR::Attribute::PositionX:
  37. case IR::Attribute::PositionY:
  38. case IR::Attribute::PositionZ:
  39. case IR::Attribute::PositionW:
  40. info.loads_position = true;
  41. break;
  42. case IR::Attribute::InstanceId:
  43. info.loads_instance_id = true;
  44. break;
  45. case IR::Attribute::VertexId:
  46. info.loads_vertex_id = true;
  47. break;
  48. case IR::Attribute::FrontFace:
  49. info.loads_front_face = true;
  50. break;
  51. case IR::Attribute::PointSpriteS:
  52. case IR::Attribute::PointSpriteT:
  53. info.loads_point_coord = true;
  54. break;
  55. case IR::Attribute::TessellationEvaluationPointU:
  56. case IR::Attribute::TessellationEvaluationPointV:
  57. info.loads_tess_coord = true;
  58. break;
  59. default:
  60. throw NotImplementedException("Get attribute {}", attribute);
  61. }
  62. }
  63. void SetAttribute(Info& info, IR::Attribute attribute) {
  64. if (IR::IsGeneric(attribute)) {
  65. info.stores_generics.at(IR::GenericAttributeIndex(attribute)) = true;
  66. return;
  67. }
  68. switch (attribute) {
  69. case IR::Attribute::PointSize:
  70. info.stores_point_size = true;
  71. break;
  72. case IR::Attribute::PositionX:
  73. case IR::Attribute::PositionY:
  74. case IR::Attribute::PositionZ:
  75. case IR::Attribute::PositionW:
  76. info.stores_position = true;
  77. break;
  78. case IR::Attribute::ClipDistance0:
  79. case IR::Attribute::ClipDistance1:
  80. case IR::Attribute::ClipDistance2:
  81. case IR::Attribute::ClipDistance3:
  82. case IR::Attribute::ClipDistance4:
  83. case IR::Attribute::ClipDistance5:
  84. case IR::Attribute::ClipDistance6:
  85. case IR::Attribute::ClipDistance7:
  86. info.stores_clip_distance = true;
  87. break;
  88. case IR::Attribute::Layer:
  89. info.stores_layer = true;
  90. break;
  91. case IR::Attribute::ViewportIndex:
  92. info.stores_viewport_index = true;
  93. break;
  94. case IR::Attribute::ViewportMask:
  95. info.stores_viewport_mask = true;
  96. break;
  97. default:
  98. throw NotImplementedException("Set attribute {}", attribute);
  99. }
  100. }
  101. void GetPatch(Info& info, IR::Patch patch) {
  102. if (!IR::IsGeneric(patch)) {
  103. throw NotImplementedException("Reading non-generic patch {}", patch);
  104. }
  105. info.uses_patches.at(IR::GenericPatchIndex(patch)) = true;
  106. }
  107. void SetPatch(Info& info, IR::Patch patch) {
  108. if (IR::IsGeneric(patch)) {
  109. info.uses_patches.at(IR::GenericPatchIndex(patch)) = true;
  110. return;
  111. }
  112. switch (patch) {
  113. case IR::Patch::TessellationLodLeft:
  114. case IR::Patch::TessellationLodTop:
  115. case IR::Patch::TessellationLodRight:
  116. case IR::Patch::TessellationLodBottom:
  117. info.stores_tess_level_outer = true;
  118. break;
  119. case IR::Patch::TessellationLodInteriorU:
  120. case IR::Patch::TessellationLodInteriorV:
  121. info.stores_tess_level_inner = true;
  122. break;
  123. default:
  124. throw NotImplementedException("Set patch {}", patch);
  125. }
  126. }
  127. void VisitUsages(Info& info, IR::Inst& inst) {
  128. switch (inst.GetOpcode()) {
  129. case IR::Opcode::CompositeConstructF16x2:
  130. case IR::Opcode::CompositeConstructF16x3:
  131. case IR::Opcode::CompositeConstructF16x4:
  132. case IR::Opcode::CompositeExtractF16x2:
  133. case IR::Opcode::CompositeExtractF16x3:
  134. case IR::Opcode::CompositeExtractF16x4:
  135. case IR::Opcode::CompositeInsertF16x2:
  136. case IR::Opcode::CompositeInsertF16x3:
  137. case IR::Opcode::CompositeInsertF16x4:
  138. case IR::Opcode::SelectF16:
  139. case IR::Opcode::BitCastU16F16:
  140. case IR::Opcode::BitCastF16U16:
  141. case IR::Opcode::PackFloat2x16:
  142. case IR::Opcode::UnpackFloat2x16:
  143. case IR::Opcode::ConvertS16F16:
  144. case IR::Opcode::ConvertS32F16:
  145. case IR::Opcode::ConvertS64F16:
  146. case IR::Opcode::ConvertU16F16:
  147. case IR::Opcode::ConvertU32F16:
  148. case IR::Opcode::ConvertU64F16:
  149. case IR::Opcode::ConvertF16S8:
  150. case IR::Opcode::ConvertF16S16:
  151. case IR::Opcode::ConvertF16S32:
  152. case IR::Opcode::ConvertF16S64:
  153. case IR::Opcode::ConvertF16U8:
  154. case IR::Opcode::ConvertF16U16:
  155. case IR::Opcode::ConvertF16U32:
  156. case IR::Opcode::ConvertF16U64:
  157. case IR::Opcode::FPAbs16:
  158. case IR::Opcode::FPAdd16:
  159. case IR::Opcode::FPCeil16:
  160. case IR::Opcode::FPFloor16:
  161. case IR::Opcode::FPFma16:
  162. case IR::Opcode::FPMul16:
  163. case IR::Opcode::FPNeg16:
  164. case IR::Opcode::FPRoundEven16:
  165. case IR::Opcode::FPSaturate16:
  166. case IR::Opcode::FPClamp16:
  167. case IR::Opcode::FPTrunc16:
  168. case IR::Opcode::FPOrdEqual16:
  169. case IR::Opcode::FPUnordEqual16:
  170. case IR::Opcode::FPOrdNotEqual16:
  171. case IR::Opcode::FPUnordNotEqual16:
  172. case IR::Opcode::FPOrdLessThan16:
  173. case IR::Opcode::FPUnordLessThan16:
  174. case IR::Opcode::FPOrdGreaterThan16:
  175. case IR::Opcode::FPUnordGreaterThan16:
  176. case IR::Opcode::FPOrdLessThanEqual16:
  177. case IR::Opcode::FPUnordLessThanEqual16:
  178. case IR::Opcode::FPOrdGreaterThanEqual16:
  179. case IR::Opcode::FPUnordGreaterThanEqual16:
  180. case IR::Opcode::FPIsNan16:
  181. case IR::Opcode::GlobalAtomicAddF16x2:
  182. case IR::Opcode::StorageAtomicAddF16x2:
  183. case IR::Opcode::StorageAtomicMinF16x2:
  184. case IR::Opcode::StorageAtomicMaxF16x2:
  185. info.uses_fp16 = true;
  186. break;
  187. case IR::Opcode::CompositeConstructF64x2:
  188. case IR::Opcode::CompositeConstructF64x3:
  189. case IR::Opcode::CompositeConstructF64x4:
  190. case IR::Opcode::CompositeExtractF64x2:
  191. case IR::Opcode::CompositeExtractF64x3:
  192. case IR::Opcode::CompositeExtractF64x4:
  193. case IR::Opcode::CompositeInsertF64x2:
  194. case IR::Opcode::CompositeInsertF64x3:
  195. case IR::Opcode::CompositeInsertF64x4:
  196. case IR::Opcode::SelectF64:
  197. case IR::Opcode::BitCastU64F64:
  198. case IR::Opcode::BitCastF64U64:
  199. case IR::Opcode::PackDouble2x32:
  200. case IR::Opcode::UnpackDouble2x32:
  201. case IR::Opcode::FPAbs64:
  202. case IR::Opcode::FPAdd64:
  203. case IR::Opcode::FPCeil64:
  204. case IR::Opcode::FPFloor64:
  205. case IR::Opcode::FPFma64:
  206. case IR::Opcode::FPMax64:
  207. case IR::Opcode::FPMin64:
  208. case IR::Opcode::FPMul64:
  209. case IR::Opcode::FPNeg64:
  210. case IR::Opcode::FPRecip64:
  211. case IR::Opcode::FPRecipSqrt64:
  212. case IR::Opcode::FPRoundEven64:
  213. case IR::Opcode::FPSaturate64:
  214. case IR::Opcode::FPClamp64:
  215. case IR::Opcode::FPTrunc64:
  216. case IR::Opcode::FPOrdEqual64:
  217. case IR::Opcode::FPUnordEqual64:
  218. case IR::Opcode::FPOrdNotEqual64:
  219. case IR::Opcode::FPUnordNotEqual64:
  220. case IR::Opcode::FPOrdLessThan64:
  221. case IR::Opcode::FPUnordLessThan64:
  222. case IR::Opcode::FPOrdGreaterThan64:
  223. case IR::Opcode::FPUnordGreaterThan64:
  224. case IR::Opcode::FPOrdLessThanEqual64:
  225. case IR::Opcode::FPUnordLessThanEqual64:
  226. case IR::Opcode::FPOrdGreaterThanEqual64:
  227. case IR::Opcode::FPUnordGreaterThanEqual64:
  228. case IR::Opcode::FPIsNan64:
  229. case IR::Opcode::ConvertS16F64:
  230. case IR::Opcode::ConvertS32F64:
  231. case IR::Opcode::ConvertS64F64:
  232. case IR::Opcode::ConvertU16F64:
  233. case IR::Opcode::ConvertU32F64:
  234. case IR::Opcode::ConvertU64F64:
  235. case IR::Opcode::ConvertF32F64:
  236. case IR::Opcode::ConvertF64F32:
  237. case IR::Opcode::ConvertF64S8:
  238. case IR::Opcode::ConvertF64S16:
  239. case IR::Opcode::ConvertF64S32:
  240. case IR::Opcode::ConvertF64S64:
  241. case IR::Opcode::ConvertF64U8:
  242. case IR::Opcode::ConvertF64U16:
  243. case IR::Opcode::ConvertF64U32:
  244. case IR::Opcode::ConvertF64U64:
  245. info.uses_fp64 = true;
  246. break;
  247. default:
  248. break;
  249. }
  250. switch (inst.GetOpcode()) {
  251. case IR::Opcode::GetCbufU8:
  252. case IR::Opcode::GetCbufS8:
  253. case IR::Opcode::UndefU8:
  254. case IR::Opcode::LoadGlobalU8:
  255. case IR::Opcode::LoadGlobalS8:
  256. case IR::Opcode::WriteGlobalU8:
  257. case IR::Opcode::WriteGlobalS8:
  258. case IR::Opcode::LoadStorageU8:
  259. case IR::Opcode::LoadStorageS8:
  260. case IR::Opcode::WriteStorageU8:
  261. case IR::Opcode::WriteStorageS8:
  262. case IR::Opcode::LoadSharedU8:
  263. case IR::Opcode::LoadSharedS8:
  264. case IR::Opcode::WriteSharedU8:
  265. case IR::Opcode::SelectU8:
  266. case IR::Opcode::ConvertF16S8:
  267. case IR::Opcode::ConvertF16U8:
  268. case IR::Opcode::ConvertF32S8:
  269. case IR::Opcode::ConvertF32U8:
  270. case IR::Opcode::ConvertF64S8:
  271. case IR::Opcode::ConvertF64U8:
  272. info.uses_int8 = true;
  273. break;
  274. default:
  275. break;
  276. }
  277. switch (inst.GetOpcode()) {
  278. case IR::Opcode::GetCbufU16:
  279. case IR::Opcode::GetCbufS16:
  280. case IR::Opcode::UndefU16:
  281. case IR::Opcode::LoadGlobalU16:
  282. case IR::Opcode::LoadGlobalS16:
  283. case IR::Opcode::WriteGlobalU16:
  284. case IR::Opcode::WriteGlobalS16:
  285. case IR::Opcode::LoadStorageU16:
  286. case IR::Opcode::LoadStorageS16:
  287. case IR::Opcode::WriteStorageU16:
  288. case IR::Opcode::WriteStorageS16:
  289. case IR::Opcode::LoadSharedU16:
  290. case IR::Opcode::LoadSharedS16:
  291. case IR::Opcode::WriteSharedU16:
  292. case IR::Opcode::SelectU16:
  293. case IR::Opcode::BitCastU16F16:
  294. case IR::Opcode::BitCastF16U16:
  295. case IR::Opcode::ConvertS16F16:
  296. case IR::Opcode::ConvertS16F32:
  297. case IR::Opcode::ConvertS16F64:
  298. case IR::Opcode::ConvertU16F16:
  299. case IR::Opcode::ConvertU16F32:
  300. case IR::Opcode::ConvertU16F64:
  301. case IR::Opcode::ConvertF16S16:
  302. case IR::Opcode::ConvertF16U16:
  303. case IR::Opcode::ConvertF32S16:
  304. case IR::Opcode::ConvertF32U16:
  305. case IR::Opcode::ConvertF64S16:
  306. case IR::Opcode::ConvertF64U16:
  307. info.uses_int16 = true;
  308. break;
  309. default:
  310. break;
  311. }
  312. switch (inst.GetOpcode()) {
  313. case IR::Opcode::UndefU64:
  314. case IR::Opcode::LoadGlobalU8:
  315. case IR::Opcode::LoadGlobalS8:
  316. case IR::Opcode::LoadGlobalU16:
  317. case IR::Opcode::LoadGlobalS16:
  318. case IR::Opcode::LoadGlobal32:
  319. case IR::Opcode::LoadGlobal64:
  320. case IR::Opcode::LoadGlobal128:
  321. case IR::Opcode::WriteGlobalU8:
  322. case IR::Opcode::WriteGlobalS8:
  323. case IR::Opcode::WriteGlobalU16:
  324. case IR::Opcode::WriteGlobalS16:
  325. case IR::Opcode::WriteGlobal32:
  326. case IR::Opcode::WriteGlobal64:
  327. case IR::Opcode::WriteGlobal128:
  328. case IR::Opcode::SelectU64:
  329. case IR::Opcode::BitCastU64F64:
  330. case IR::Opcode::BitCastF64U64:
  331. case IR::Opcode::PackUint2x32:
  332. case IR::Opcode::UnpackUint2x32:
  333. case IR::Opcode::IAdd64:
  334. case IR::Opcode::ISub64:
  335. case IR::Opcode::INeg64:
  336. case IR::Opcode::ShiftLeftLogical64:
  337. case IR::Opcode::ShiftRightLogical64:
  338. case IR::Opcode::ShiftRightArithmetic64:
  339. case IR::Opcode::ConvertS64F16:
  340. case IR::Opcode::ConvertS64F32:
  341. case IR::Opcode::ConvertS64F64:
  342. case IR::Opcode::ConvertU64F16:
  343. case IR::Opcode::ConvertU64F32:
  344. case IR::Opcode::ConvertU64F64:
  345. case IR::Opcode::ConvertU64U32:
  346. case IR::Opcode::ConvertU32U64:
  347. case IR::Opcode::ConvertF16U64:
  348. case IR::Opcode::ConvertF32U64:
  349. case IR::Opcode::ConvertF64U64:
  350. case IR::Opcode::SharedAtomicExchange64:
  351. case IR::Opcode::GlobalAtomicIAdd64:
  352. case IR::Opcode::GlobalAtomicSMin64:
  353. case IR::Opcode::GlobalAtomicUMin64:
  354. case IR::Opcode::GlobalAtomicSMax64:
  355. case IR::Opcode::GlobalAtomicUMax64:
  356. case IR::Opcode::GlobalAtomicAnd64:
  357. case IR::Opcode::GlobalAtomicOr64:
  358. case IR::Opcode::GlobalAtomicXor64:
  359. case IR::Opcode::GlobalAtomicExchange64:
  360. case IR::Opcode::StorageAtomicIAdd64:
  361. case IR::Opcode::StorageAtomicSMin64:
  362. case IR::Opcode::StorageAtomicUMin64:
  363. case IR::Opcode::StorageAtomicSMax64:
  364. case IR::Opcode::StorageAtomicUMax64:
  365. case IR::Opcode::StorageAtomicAnd64:
  366. case IR::Opcode::StorageAtomicOr64:
  367. case IR::Opcode::StorageAtomicXor64:
  368. info.uses_int64 = true;
  369. break;
  370. default:
  371. break;
  372. }
  373. switch (inst.GetOpcode()) {
  374. case IR::Opcode::DemoteToHelperInvocation:
  375. info.uses_demote_to_helper_invocation = true;
  376. break;
  377. case IR::Opcode::GetAttribute:
  378. GetAttribute(info, inst.Arg(0).Attribute());
  379. break;
  380. case IR::Opcode::SetAttribute:
  381. SetAttribute(info, inst.Arg(0).Attribute());
  382. break;
  383. case IR::Opcode::GetPatch:
  384. GetPatch(info, inst.Arg(0).Patch());
  385. break;
  386. case IR::Opcode::SetPatch:
  387. SetPatch(info, inst.Arg(0).Patch());
  388. break;
  389. case IR::Opcode::GetAttributeIndexed:
  390. info.loads_indexed_attributes = true;
  391. break;
  392. case IR::Opcode::SetAttributeIndexed:
  393. info.stores_indexed_attributes = true;
  394. break;
  395. case IR::Opcode::SetFragColor:
  396. info.stores_frag_color[inst.Arg(0).U32()] = true;
  397. break;
  398. case IR::Opcode::SetSampleMask:
  399. info.stores_sample_mask = true;
  400. break;
  401. case IR::Opcode::SetFragDepth:
  402. info.stores_frag_depth = true;
  403. break;
  404. case IR::Opcode::WorkgroupId:
  405. info.uses_workgroup_id = true;
  406. break;
  407. case IR::Opcode::LocalInvocationId:
  408. info.uses_local_invocation_id = true;
  409. break;
  410. case IR::Opcode::InvocationId:
  411. info.uses_invocation_id = true;
  412. break;
  413. case IR::Opcode::SampleId:
  414. info.uses_sample_id = true;
  415. break;
  416. case IR::Opcode::IsHelperInvocation:
  417. info.uses_is_helper_invocation = true;
  418. break;
  419. case IR::Opcode::LaneId:
  420. case IR::Opcode::ShuffleIndex:
  421. case IR::Opcode::ShuffleUp:
  422. case IR::Opcode::ShuffleDown:
  423. case IR::Opcode::ShuffleButterfly:
  424. info.uses_subgroup_invocation_id = true;
  425. break;
  426. case IR::Opcode::GetCbufU8:
  427. case IR::Opcode::GetCbufS8:
  428. case IR::Opcode::GetCbufU16:
  429. case IR::Opcode::GetCbufS16:
  430. case IR::Opcode::GetCbufU32:
  431. case IR::Opcode::GetCbufF32:
  432. case IR::Opcode::GetCbufU32x2: {
  433. if (const IR::Value index{inst.Arg(0)}; index.IsImmediate()) {
  434. AddConstantBufferDescriptor(info, index.U32(), 1);
  435. } else {
  436. throw NotImplementedException("Constant buffer with non-immediate index");
  437. }
  438. switch (inst.GetOpcode()) {
  439. case IR::Opcode::GetCbufU8:
  440. case IR::Opcode::GetCbufS8:
  441. info.used_constant_buffer_types |= IR::Type::U8;
  442. break;
  443. case IR::Opcode::GetCbufU16:
  444. case IR::Opcode::GetCbufS16:
  445. info.used_constant_buffer_types |= IR::Type::U16;
  446. break;
  447. case IR::Opcode::GetCbufU32:
  448. info.used_constant_buffer_types |= IR::Type::U32;
  449. break;
  450. case IR::Opcode::GetCbufF32:
  451. info.used_constant_buffer_types |= IR::Type::F32;
  452. break;
  453. case IR::Opcode::GetCbufU32x2:
  454. info.used_constant_buffer_types |= IR::Type::U32x2;
  455. break;
  456. default:
  457. break;
  458. }
  459. break;
  460. }
  461. case IR::Opcode::BindlessImageSampleImplicitLod:
  462. case IR::Opcode::BindlessImageSampleExplicitLod:
  463. case IR::Opcode::BindlessImageSampleDrefImplicitLod:
  464. case IR::Opcode::BindlessImageSampleDrefExplicitLod:
  465. case IR::Opcode::BindlessImageGather:
  466. case IR::Opcode::BindlessImageGatherDref:
  467. case IR::Opcode::BindlessImageFetch:
  468. case IR::Opcode::BindlessImageQueryDimensions:
  469. case IR::Opcode::BindlessImageQueryLod:
  470. case IR::Opcode::BindlessImageGradient:
  471. case IR::Opcode::BoundImageSampleImplicitLod:
  472. case IR::Opcode::BoundImageSampleExplicitLod:
  473. case IR::Opcode::BoundImageSampleDrefImplicitLod:
  474. case IR::Opcode::BoundImageSampleDrefExplicitLod:
  475. case IR::Opcode::BoundImageGather:
  476. case IR::Opcode::BoundImageGatherDref:
  477. case IR::Opcode::BoundImageFetch:
  478. case IR::Opcode::BoundImageQueryDimensions:
  479. case IR::Opcode::BoundImageQueryLod:
  480. case IR::Opcode::BoundImageGradient:
  481. case IR::Opcode::ImageSampleImplicitLod:
  482. case IR::Opcode::ImageSampleExplicitLod:
  483. case IR::Opcode::ImageSampleDrefImplicitLod:
  484. case IR::Opcode::ImageSampleDrefExplicitLod:
  485. case IR::Opcode::ImageGather:
  486. case IR::Opcode::ImageGatherDref:
  487. case IR::Opcode::ImageFetch:
  488. case IR::Opcode::ImageQueryDimensions:
  489. case IR::Opcode::ImageQueryLod:
  490. case IR::Opcode::ImageGradient: {
  491. const TextureType type{inst.Flags<IR::TextureInstInfo>().type};
  492. info.uses_sampled_1d |= type == TextureType::Color1D || type == TextureType::ColorArray1D;
  493. info.uses_sparse_residency |=
  494. inst.GetAssociatedPseudoOperation(IR::Opcode::GetSparseFromOp) != nullptr;
  495. break;
  496. }
  497. case IR::Opcode::ImageRead: {
  498. const auto flags{inst.Flags<IR::TextureInstInfo>()};
  499. info.uses_typeless_image_reads |= flags.image_format == ImageFormat::Typeless;
  500. info.uses_sparse_residency |=
  501. inst.GetAssociatedPseudoOperation(IR::Opcode::GetSparseFromOp) != nullptr;
  502. break;
  503. }
  504. case IR::Opcode::ImageWrite: {
  505. const auto flags{inst.Flags<IR::TextureInstInfo>()};
  506. info.uses_typeless_image_writes |= flags.image_format == ImageFormat::Typeless;
  507. break;
  508. }
  509. case IR::Opcode::SubgroupEqMask:
  510. case IR::Opcode::SubgroupLtMask:
  511. case IR::Opcode::SubgroupLeMask:
  512. case IR::Opcode::SubgroupGtMask:
  513. case IR::Opcode::SubgroupGeMask:
  514. info.uses_subgroup_mask = true;
  515. break;
  516. case IR::Opcode::VoteAll:
  517. case IR::Opcode::VoteAny:
  518. case IR::Opcode::VoteEqual:
  519. case IR::Opcode::SubgroupBallot:
  520. info.uses_subgroup_vote = true;
  521. break;
  522. case IR::Opcode::FSwizzleAdd:
  523. info.uses_fswzadd = true;
  524. break;
  525. case IR::Opcode::DPdxFine:
  526. case IR::Opcode::DPdyFine:
  527. case IR::Opcode::DPdxCoarse:
  528. case IR::Opcode::DPdyCoarse:
  529. info.uses_derivatives = true;
  530. break;
  531. case IR::Opcode::LoadStorageU8:
  532. case IR::Opcode::LoadStorageS8:
  533. case IR::Opcode::WriteStorageU8:
  534. case IR::Opcode::WriteStorageS8:
  535. info.used_storage_buffer_types |= IR::Type::U8;
  536. break;
  537. case IR::Opcode::LoadStorageU16:
  538. case IR::Opcode::LoadStorageS16:
  539. case IR::Opcode::WriteStorageU16:
  540. case IR::Opcode::WriteStorageS16:
  541. info.used_storage_buffer_types |= IR::Type::U16;
  542. break;
  543. case IR::Opcode::LoadStorage32:
  544. case IR::Opcode::WriteStorage32:
  545. case IR::Opcode::StorageAtomicIAdd32:
  546. case IR::Opcode::StorageAtomicSMin32:
  547. case IR::Opcode::StorageAtomicUMin32:
  548. case IR::Opcode::StorageAtomicSMax32:
  549. case IR::Opcode::StorageAtomicUMax32:
  550. case IR::Opcode::StorageAtomicAnd32:
  551. case IR::Opcode::StorageAtomicOr32:
  552. case IR::Opcode::StorageAtomicXor32:
  553. case IR::Opcode::StorageAtomicExchange32:
  554. info.used_storage_buffer_types |= IR::Type::U32;
  555. break;
  556. case IR::Opcode::LoadStorage64:
  557. case IR::Opcode::WriteStorage64:
  558. info.used_storage_buffer_types |= IR::Type::U32x2;
  559. break;
  560. case IR::Opcode::LoadStorage128:
  561. case IR::Opcode::WriteStorage128:
  562. info.used_storage_buffer_types |= IR::Type::U32x4;
  563. break;
  564. case IR::Opcode::SharedAtomicInc32:
  565. info.uses_shared_increment = true;
  566. break;
  567. case IR::Opcode::SharedAtomicDec32:
  568. info.uses_shared_decrement = true;
  569. break;
  570. case IR::Opcode::SharedAtomicExchange64:
  571. info.uses_int64_bit_atomics = true;
  572. break;
  573. case IR::Opcode::GlobalAtomicInc32:
  574. case IR::Opcode::StorageAtomicInc32:
  575. info.used_storage_buffer_types |= IR::Type::U32;
  576. info.uses_global_increment = true;
  577. break;
  578. case IR::Opcode::GlobalAtomicDec32:
  579. case IR::Opcode::StorageAtomicDec32:
  580. info.used_storage_buffer_types |= IR::Type::U32;
  581. info.uses_global_decrement = true;
  582. break;
  583. case IR::Opcode::GlobalAtomicAddF32:
  584. case IR::Opcode::StorageAtomicAddF32:
  585. info.used_storage_buffer_types |= IR::Type::U32;
  586. info.uses_atomic_f32_add = true;
  587. break;
  588. case IR::Opcode::GlobalAtomicAddF16x2:
  589. case IR::Opcode::StorageAtomicAddF16x2:
  590. info.used_storage_buffer_types |= IR::Type::U32;
  591. info.uses_atomic_f16x2_add = true;
  592. break;
  593. case IR::Opcode::GlobalAtomicAddF32x2:
  594. case IR::Opcode::StorageAtomicAddF32x2:
  595. info.used_storage_buffer_types |= IR::Type::U32;
  596. info.uses_atomic_f32x2_add = true;
  597. break;
  598. case IR::Opcode::GlobalAtomicMinF16x2:
  599. case IR::Opcode::StorageAtomicMinF16x2:
  600. info.used_storage_buffer_types |= IR::Type::U32;
  601. info.uses_atomic_f16x2_min = true;
  602. break;
  603. case IR::Opcode::GlobalAtomicMinF32x2:
  604. case IR::Opcode::StorageAtomicMinF32x2:
  605. info.used_storage_buffer_types |= IR::Type::U32;
  606. info.uses_atomic_f32x2_min = true;
  607. break;
  608. case IR::Opcode::GlobalAtomicMaxF16x2:
  609. case IR::Opcode::StorageAtomicMaxF16x2:
  610. info.used_storage_buffer_types |= IR::Type::U32;
  611. info.uses_atomic_f16x2_max = true;
  612. break;
  613. case IR::Opcode::GlobalAtomicMaxF32x2:
  614. case IR::Opcode::StorageAtomicMaxF32x2:
  615. info.used_storage_buffer_types |= IR::Type::U32;
  616. info.uses_atomic_f32x2_max = true;
  617. break;
  618. case IR::Opcode::GlobalAtomicIAdd64:
  619. case IR::Opcode::GlobalAtomicSMin64:
  620. case IR::Opcode::GlobalAtomicUMin64:
  621. case IR::Opcode::GlobalAtomicSMax64:
  622. case IR::Opcode::GlobalAtomicUMax64:
  623. case IR::Opcode::GlobalAtomicAnd64:
  624. case IR::Opcode::GlobalAtomicOr64:
  625. case IR::Opcode::GlobalAtomicXor64:
  626. case IR::Opcode::GlobalAtomicExchange64:
  627. case IR::Opcode::StorageAtomicIAdd64:
  628. case IR::Opcode::StorageAtomicSMin64:
  629. case IR::Opcode::StorageAtomicUMin64:
  630. case IR::Opcode::StorageAtomicSMax64:
  631. case IR::Opcode::StorageAtomicUMax64:
  632. case IR::Opcode::StorageAtomicAnd64:
  633. case IR::Opcode::StorageAtomicOr64:
  634. case IR::Opcode::StorageAtomicXor64:
  635. info.used_storage_buffer_types |= IR::Type::U64;
  636. info.uses_int64_bit_atomics = true;
  637. break;
  638. default:
  639. break;
  640. }
  641. }
  642. void VisitFpModifiers(Info& info, IR::Inst& inst) {
  643. switch (inst.GetOpcode()) {
  644. case IR::Opcode::FPAdd16:
  645. case IR::Opcode::FPFma16:
  646. case IR::Opcode::FPMul16:
  647. case IR::Opcode::FPRoundEven16:
  648. case IR::Opcode::FPFloor16:
  649. case IR::Opcode::FPCeil16:
  650. case IR::Opcode::FPTrunc16: {
  651. const auto control{inst.Flags<IR::FpControl>()};
  652. switch (control.fmz_mode) {
  653. case IR::FmzMode::DontCare:
  654. break;
  655. case IR::FmzMode::FTZ:
  656. case IR::FmzMode::FMZ:
  657. info.uses_fp16_denorms_flush = true;
  658. break;
  659. case IR::FmzMode::None:
  660. info.uses_fp16_denorms_preserve = true;
  661. break;
  662. }
  663. break;
  664. }
  665. case IR::Opcode::FPAdd32:
  666. case IR::Opcode::FPFma32:
  667. case IR::Opcode::FPMul32:
  668. case IR::Opcode::FPRoundEven32:
  669. case IR::Opcode::FPFloor32:
  670. case IR::Opcode::FPCeil32:
  671. case IR::Opcode::FPTrunc32:
  672. case IR::Opcode::FPOrdEqual32:
  673. case IR::Opcode::FPUnordEqual32:
  674. case IR::Opcode::FPOrdNotEqual32:
  675. case IR::Opcode::FPUnordNotEqual32:
  676. case IR::Opcode::FPOrdLessThan32:
  677. case IR::Opcode::FPUnordLessThan32:
  678. case IR::Opcode::FPOrdGreaterThan32:
  679. case IR::Opcode::FPUnordGreaterThan32:
  680. case IR::Opcode::FPOrdLessThanEqual32:
  681. case IR::Opcode::FPUnordLessThanEqual32:
  682. case IR::Opcode::FPOrdGreaterThanEqual32:
  683. case IR::Opcode::FPUnordGreaterThanEqual32:
  684. case IR::Opcode::ConvertF16F32:
  685. case IR::Opcode::ConvertF64F32: {
  686. const auto control{inst.Flags<IR::FpControl>()};
  687. switch (control.fmz_mode) {
  688. case IR::FmzMode::DontCare:
  689. break;
  690. case IR::FmzMode::FTZ:
  691. case IR::FmzMode::FMZ:
  692. info.uses_fp32_denorms_flush = true;
  693. break;
  694. case IR::FmzMode::None:
  695. info.uses_fp32_denorms_preserve = true;
  696. break;
  697. }
  698. break;
  699. }
  700. default:
  701. break;
  702. }
  703. }
  704. void Visit(Info& info, IR::Inst& inst) {
  705. VisitUsages(info, inst);
  706. VisitFpModifiers(info, inst);
  707. }
  708. void GatherInfoFromHeader(Environment& env, Info& info) {
  709. Stage stage{env.ShaderStage()};
  710. if (stage == Stage::Compute) {
  711. return;
  712. }
  713. const auto& header{env.SPH()};
  714. if (stage == Stage::Fragment) {
  715. if (!info.loads_indexed_attributes) {
  716. return;
  717. }
  718. for (size_t i = 0; i < info.input_generics.size(); i++) {
  719. info.input_generics[i].used |= header.ps.IsGenericVectorActive(i);
  720. }
  721. info.loads_position |= header.ps.imap_systemb.position != 0;
  722. return;
  723. }
  724. if (info.loads_indexed_attributes) {
  725. for (size_t i = 0; i < info.input_generics.size(); i++) {
  726. info.input_generics[i].used |= header.vtg.IsInputGenericVectorActive(i);
  727. }
  728. info.loads_position |= header.vtg.imap_systemb.position != 0;
  729. }
  730. if (info.stores_indexed_attributes) {
  731. for (size_t i = 0; i < info.stores_generics.size(); i++) {
  732. info.stores_generics[i] |= header.vtg.IsOutputGenericVectorActive(i);
  733. }
  734. info.stores_clip_distance |= header.vtg.omap_systemc.clip_distances != 0;
  735. info.stores_position |= header.vtg.omap_systemb.position != 0;
  736. }
  737. }
  738. } // Anonymous namespace
  739. void CollectShaderInfoPass(Environment& env, IR::Program& program) {
  740. Info& info{program.info};
  741. for (IR::Block* const block : program.post_order_blocks) {
  742. for (IR::Inst& inst : block->Instructions()) {
  743. Visit(info, inst);
  744. }
  745. }
  746. GatherInfoFromHeader(env, info);
  747. }
  748. } // namespace Shader::Optimization