memory.h 7.2 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212
  1. // Copyright 2014 Citra Emulator Project
  2. // Licensed under GPLv2 or any later version
  3. // Refer to the license.txt file included.
  4. #pragma once
  5. #include <array>
  6. #include <cstddef>
  7. #include <string>
  8. #include <boost/optional.hpp>
  9. #include "common/common_types.h"
  10. namespace Memory {
  11. /**
  12. * Page size used by the ARM architecture. This is the smallest granularity with which memory can
  13. * be mapped.
  14. */
  15. const int PAGE_BITS = 12;
  16. const u64 PAGE_SIZE = 1 << PAGE_BITS;
  17. const u64 PAGE_MASK = PAGE_SIZE - 1;
  18. const size_t PAGE_TABLE_NUM_ENTRIES = 1ULL << (64 - PAGE_BITS);
  19. /// Physical memory regions as seen from the ARM11
  20. enum : PAddr {
  21. /// IO register area
  22. IO_AREA_PADDR = 0x10100000,
  23. IO_AREA_SIZE = 0x01000000, ///< IO area size (16MB)
  24. IO_AREA_PADDR_END = IO_AREA_PADDR + IO_AREA_SIZE,
  25. /// MPCore internal memory region
  26. MPCORE_RAM_PADDR = 0x17E00000,
  27. MPCORE_RAM_SIZE = 0x00002000, ///< MPCore internal memory size (8KB)
  28. MPCORE_RAM_PADDR_END = MPCORE_RAM_PADDR + MPCORE_RAM_SIZE,
  29. /// Video memory
  30. VRAM_PADDR = 0x18000000,
  31. VRAM_SIZE = 0x00600000, ///< VRAM size (6MB)
  32. VRAM_PADDR_END = VRAM_PADDR + VRAM_SIZE,
  33. /// New 3DS additional memory. Supposedly faster than regular FCRAM. Part of it can be used by
  34. /// applications and system modules if mapped via the ExHeader.
  35. N3DS_EXTRA_RAM_PADDR = 0x1F000000,
  36. N3DS_EXTRA_RAM_SIZE = 0x00400000, ///< New 3DS additional memory size (4MB)
  37. N3DS_EXTRA_RAM_PADDR_END = N3DS_EXTRA_RAM_PADDR + N3DS_EXTRA_RAM_SIZE,
  38. /// DSP memory
  39. DSP_RAM_PADDR = 0x1FF00000,
  40. DSP_RAM_SIZE = 0x00080000, ///< DSP memory size (512KB)
  41. DSP_RAM_PADDR_END = DSP_RAM_PADDR + DSP_RAM_SIZE,
  42. /// AXI WRAM
  43. AXI_WRAM_PADDR = 0x1FF80000,
  44. AXI_WRAM_SIZE = 0x00080000, ///< AXI WRAM size (512KB)
  45. AXI_WRAM_PADDR_END = AXI_WRAM_PADDR + AXI_WRAM_SIZE,
  46. /// Main FCRAM
  47. FCRAM_PADDR = 0x20000000,
  48. FCRAM_SIZE = 0x08000000, ///< FCRAM size on the Old 3DS (128MB)
  49. FCRAM_N3DS_SIZE = 0x10000000, ///< FCRAM size on the New 3DS (256MB)
  50. FCRAM_PADDR_END = FCRAM_PADDR + FCRAM_SIZE,
  51. FCRAM_N3DS_PADDR_END = FCRAM_PADDR + FCRAM_N3DS_SIZE,
  52. };
  53. /// Virtual user-space memory regions
  54. enum : VAddr {
  55. /// Where the application text, data and bss reside.
  56. PROCESS_IMAGE_VADDR = 0x00100000,
  57. PROCESS_IMAGE_MAX_SIZE = 0x03F00000,
  58. PROCESS_IMAGE_VADDR_END = PROCESS_IMAGE_VADDR + PROCESS_IMAGE_MAX_SIZE,
  59. /// Area where IPC buffers are mapped onto.
  60. IPC_MAPPING_VADDR = 0x04000000,
  61. IPC_MAPPING_SIZE = 0x04000000,
  62. IPC_MAPPING_VADDR_END = IPC_MAPPING_VADDR + IPC_MAPPING_SIZE,
  63. /// Application heap (includes stack).
  64. HEAP_VADDR = 0x08000000,
  65. HEAP_SIZE = 0x08000000,
  66. HEAP_VADDR_END = HEAP_VADDR + HEAP_SIZE,
  67. /// Area where shared memory buffers are mapped onto.
  68. SHARED_MEMORY_VADDR = 0x10000000,
  69. SHARED_MEMORY_SIZE = 0x04000000,
  70. SHARED_MEMORY_VADDR_END = SHARED_MEMORY_VADDR + SHARED_MEMORY_SIZE,
  71. /// Maps 1:1 to an offset in FCRAM. Used for HW allocations that need to be linear in physical
  72. /// memory.
  73. LINEAR_HEAP_VADDR = 0x14000000,
  74. LINEAR_HEAP_SIZE = 0x08000000,
  75. LINEAR_HEAP_VADDR_END = LINEAR_HEAP_VADDR + LINEAR_HEAP_SIZE,
  76. /// Maps 1:1 to New 3DS additional memory
  77. N3DS_EXTRA_RAM_VADDR = 0x1E800000,
  78. N3DS_EXTRA_RAM_VADDR_END = N3DS_EXTRA_RAM_VADDR + N3DS_EXTRA_RAM_SIZE,
  79. /// Maps 1:1 to the IO register area.
  80. IO_AREA_VADDR = 0x1EC00000,
  81. IO_AREA_VADDR_END = IO_AREA_VADDR + IO_AREA_SIZE,
  82. /// Maps 1:1 to VRAM.
  83. VRAM_VADDR = 0x1F000000,
  84. VRAM_VADDR_END = VRAM_VADDR + VRAM_SIZE,
  85. /// Maps 1:1 to DSP memory.
  86. DSP_RAM_VADDR = 0x1FF00000,
  87. DSP_RAM_VADDR_END = DSP_RAM_VADDR + DSP_RAM_SIZE,
  88. /// Read-only page containing kernel and system configuration values.
  89. CONFIG_MEMORY_VADDR = 0x1FF80000,
  90. CONFIG_MEMORY_SIZE = 0x00001000,
  91. CONFIG_MEMORY_VADDR_END = CONFIG_MEMORY_VADDR + CONFIG_MEMORY_SIZE,
  92. /// Usually read-only page containing mostly values read from hardware.
  93. SHARED_PAGE_VADDR = 0x1FF81000,
  94. SHARED_PAGE_SIZE = 0x00001000,
  95. SHARED_PAGE_VADDR_END = SHARED_PAGE_VADDR + SHARED_PAGE_SIZE,
  96. /// Area where TLS (Thread-Local Storage) buffers are allocated.
  97. TLS_AREA_VADDR = 0x1FF82000,
  98. TLS_ENTRY_SIZE = 0x200,
  99. /// Equivalent to LINEAR_HEAP_VADDR, but expanded to cover the extra memory in the New 3DS.
  100. NEW_LINEAR_HEAP_VADDR = 0x30000000,
  101. NEW_LINEAR_HEAP_SIZE = 0x10000000,
  102. NEW_LINEAR_HEAP_VADDR_END = NEW_LINEAR_HEAP_VADDR + NEW_LINEAR_HEAP_SIZE,
  103. };
  104. bool IsValidVirtualAddress(const VAddr addr);
  105. bool IsValidPhysicalAddress(const PAddr addr);
  106. u8 Read8(VAddr addr);
  107. u16 Read16(VAddr addr);
  108. u32 Read32(VAddr addr);
  109. u64 Read64(VAddr addr);
  110. void Write8(VAddr addr, u8 data);
  111. void Write16(VAddr addr, u16 data);
  112. void Write32(VAddr addr, u32 data);
  113. void Write64(VAddr addr, u64 data);
  114. void ReadBlock(const VAddr src_addr, void* dest_buffer, size_t size);
  115. void WriteBlock(const VAddr dest_addr, const void* src_buffer, size_t size);
  116. void ZeroBlock(const VAddr dest_addr, const size_t size);
  117. void CopyBlock(VAddr dest_addr, VAddr src_addr, size_t size);
  118. u8* GetPointer(VAddr virtual_address);
  119. std::string ReadCString(VAddr virtual_address, std::size_t max_length);
  120. /**
  121. * Converts a virtual address inside a region with 1:1 mapping to physical memory to a physical
  122. * address. This should be used by services to translate addresses for use by the hardware.
  123. */
  124. boost::optional<PAddr> TryVirtualToPhysicalAddress(VAddr addr);
  125. /**
  126. * Converts a virtual address inside a region with 1:1 mapping to physical memory to a physical
  127. * address. This should be used by services to translate addresses for use by the hardware.
  128. *
  129. * @deprecated Use TryVirtualToPhysicalAddress(), which reports failure.
  130. */
  131. PAddr VirtualToPhysicalAddress(VAddr addr);
  132. /**
  133. * Undoes a mapping performed by VirtualToPhysicalAddress().
  134. */
  135. boost::optional<VAddr> PhysicalToVirtualAddress(PAddr addr);
  136. /**
  137. * Gets a pointer to the memory region beginning at the specified physical address.
  138. *
  139. * @note This is currently implemented using PhysicalToVirtualAddress().
  140. */
  141. u8* GetPhysicalPointer(PAddr address);
  142. /**
  143. * Adds the supplied value to the rasterizer resource cache counter of each
  144. * page touching the region.
  145. */
  146. void RasterizerMarkRegionCached(PAddr start, u64 size, int count_delta);
  147. /**
  148. * Flushes any externally cached rasterizer resources touching the given region.
  149. */
  150. void RasterizerFlushRegion(PAddr start, u64 size);
  151. /**
  152. * Flushes and invalidates any externally cached rasterizer resources touching the given region.
  153. */
  154. void RasterizerFlushAndInvalidateRegion(PAddr start, u64 size);
  155. enum class FlushMode {
  156. /// Write back modified surfaces to RAM
  157. Flush,
  158. /// Write back modified surfaces to RAM, and also remove them from the cache
  159. FlushAndInvalidate,
  160. };
  161. /**
  162. * Flushes and invalidates any externally cached rasterizer resources touching the given virtual
  163. * address region.
  164. */
  165. void RasterizerFlushVirtualRegion(VAddr start, u64 size, FlushMode mode);
  166. /**
  167. * Dynarmic has an optimization to memory accesses when the pointer to the page exists that
  168. * can be used by setting up the current page table as a callback. This function is used to
  169. * retrieve the current page table for that purpose.
  170. */
  171. //std::array<u8*, PAGE_TABLE_NUM_ENTRIES>* GetCurrentPageTablePointers();
  172. }