maxwell_dma.cpp 16 KB

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  1. // SPDX-FileCopyrightText: Copyright 2018 yuzu Emulator Project
  2. // SPDX-License-Identifier: GPL-2.0-or-later
  3. #include "common/algorithm.h"
  4. #include "common/assert.h"
  5. #include "common/logging/log.h"
  6. #include "common/microprofile.h"
  7. #include "common/settings.h"
  8. #include "core/core.h"
  9. #include "video_core/engines/maxwell_3d.h"
  10. #include "video_core/engines/maxwell_dma.h"
  11. #include "video_core/memory_manager.h"
  12. #include "video_core/renderer_base.h"
  13. #include "video_core/textures/decoders.h"
  14. MICROPROFILE_DECLARE(GPU_DMAEngine);
  15. MICROPROFILE_DEFINE(GPU_DMAEngine, "GPU", "DMA Engine", MP_RGB(224, 224, 128));
  16. namespace Tegra::Engines {
  17. using namespace Texture;
  18. MaxwellDMA::MaxwellDMA(Core::System& system_, MemoryManager& memory_manager_)
  19. : system{system_}, memory_manager{memory_manager_} {}
  20. MaxwellDMA::~MaxwellDMA() = default;
  21. void MaxwellDMA::BindRasterizer(VideoCore::RasterizerInterface* rasterizer_) {
  22. rasterizer = rasterizer_;
  23. }
  24. void MaxwellDMA::CallMethod(u32 method, u32 method_argument, bool is_last_call) {
  25. ASSERT_MSG(method < NUM_REGS, "Invalid MaxwellDMA register");
  26. regs.reg_array[method] = method_argument;
  27. if (method == offsetof(Regs, launch_dma) / sizeof(u32)) {
  28. Launch();
  29. }
  30. }
  31. void MaxwellDMA::CallMultiMethod(u32 method, const u32* base_start, u32 amount,
  32. u32 methods_pending) {
  33. for (u32 i = 0; i < amount; ++i) {
  34. CallMethod(method, base_start[i], methods_pending - i <= 1);
  35. }
  36. }
  37. void MaxwellDMA::Launch() {
  38. MICROPROFILE_SCOPE(GPU_DMAEngine);
  39. LOG_TRACE(Render_OpenGL, "DMA copy 0x{:x} -> 0x{:x}", static_cast<GPUVAddr>(regs.offset_in),
  40. static_cast<GPUVAddr>(regs.offset_out));
  41. // TODO(Subv): Perform more research and implement all features of this engine.
  42. const LaunchDMA& launch = regs.launch_dma;
  43. ASSERT(launch.interrupt_type == LaunchDMA::InterruptType::NONE);
  44. ASSERT(launch.data_transfer_type == LaunchDMA::DataTransferType::NON_PIPELINED);
  45. if (launch.multi_line_enable) {
  46. const bool is_src_pitch = launch.src_memory_layout == LaunchDMA::MemoryLayout::PITCH;
  47. const bool is_dst_pitch = launch.dst_memory_layout == LaunchDMA::MemoryLayout::PITCH;
  48. if (!is_src_pitch && !is_dst_pitch) {
  49. // If both the source and the destination are in block layout, assert.
  50. CopyBlockLinearToBlockLinear();
  51. ReleaseSemaphore();
  52. return;
  53. }
  54. if (is_src_pitch && is_dst_pitch) {
  55. for (u32 line = 0; line < regs.line_count; ++line) {
  56. const GPUVAddr source_line =
  57. regs.offset_in + static_cast<size_t>(line) * regs.pitch_in;
  58. const GPUVAddr dest_line =
  59. regs.offset_out + static_cast<size_t>(line) * regs.pitch_out;
  60. memory_manager.CopyBlock(dest_line, source_line, regs.line_length_in);
  61. }
  62. } else {
  63. if (!is_src_pitch && is_dst_pitch) {
  64. CopyBlockLinearToPitch();
  65. } else {
  66. CopyPitchToBlockLinear();
  67. }
  68. }
  69. } else {
  70. // TODO: allow multisized components.
  71. auto& accelerate = rasterizer->AccessAccelerateDMA();
  72. const bool is_const_a_dst = regs.remap_const.dst_x == RemapConst::Swizzle::CONST_A;
  73. if (regs.launch_dma.remap_enable != 0 && is_const_a_dst) {
  74. ASSERT(regs.remap_const.component_size_minus_one == 3);
  75. accelerate.BufferClear(regs.offset_out, regs.line_length_in, regs.remap_consta_value);
  76. std::vector<u32> tmp_buffer(regs.line_length_in, regs.remap_consta_value);
  77. memory_manager.WriteBlockUnsafe(regs.offset_out,
  78. reinterpret_cast<u8*>(tmp_buffer.data()),
  79. regs.line_length_in * sizeof(u32));
  80. } else {
  81. const auto convert_linear_2_blocklinear_addr = [](u64 address) {
  82. return (address & ~0x1f0ULL) | ((address & 0x40) >> 2) | ((address & 0x10) << 1) |
  83. ((address & 0x180) >> 1) | ((address & 0x20) << 3);
  84. };
  85. const auto src_kind = memory_manager.GetPageKind(regs.offset_in);
  86. const auto dst_kind = memory_manager.GetPageKind(regs.offset_out);
  87. const bool is_src_pitch = IsPitchKind(src_kind);
  88. const bool is_dst_pitch = IsPitchKind(dst_kind);
  89. if (!is_src_pitch && is_dst_pitch) {
  90. UNIMPLEMENTED_IF(regs.line_length_in % 16 != 0);
  91. UNIMPLEMENTED_IF(regs.offset_in % 16 != 0);
  92. UNIMPLEMENTED_IF(regs.offset_out % 16 != 0);
  93. std::vector<u8> tmp_buffer(16);
  94. for (u32 offset = 0; offset < regs.line_length_in; offset += 16) {
  95. memory_manager.ReadBlockUnsafe(
  96. convert_linear_2_blocklinear_addr(regs.offset_in + offset),
  97. tmp_buffer.data(), tmp_buffer.size());
  98. memory_manager.WriteBlock(regs.offset_out + offset, tmp_buffer.data(),
  99. tmp_buffer.size());
  100. }
  101. } else if (is_src_pitch && !is_dst_pitch) {
  102. UNIMPLEMENTED_IF(regs.line_length_in % 16 != 0);
  103. UNIMPLEMENTED_IF(regs.offset_in % 16 != 0);
  104. UNIMPLEMENTED_IF(regs.offset_out % 16 != 0);
  105. std::vector<u8> tmp_buffer(16);
  106. for (u32 offset = 0; offset < regs.line_length_in; offset += 16) {
  107. memory_manager.ReadBlockUnsafe(regs.offset_in + offset, tmp_buffer.data(),
  108. tmp_buffer.size());
  109. memory_manager.WriteBlock(
  110. convert_linear_2_blocklinear_addr(regs.offset_out + offset),
  111. tmp_buffer.data(), tmp_buffer.size());
  112. }
  113. } else {
  114. if (!accelerate.BufferCopy(regs.offset_in, regs.offset_out, regs.line_length_in)) {
  115. std::vector<u8> tmp_buffer(regs.line_length_in);
  116. memory_manager.ReadBlockUnsafe(regs.offset_in, tmp_buffer.data(),
  117. regs.line_length_in);
  118. memory_manager.WriteBlock(regs.offset_out, tmp_buffer.data(),
  119. regs.line_length_in);
  120. }
  121. }
  122. }
  123. }
  124. ReleaseSemaphore();
  125. }
  126. void MaxwellDMA::CopyBlockLinearToPitch() {
  127. UNIMPLEMENTED_IF(regs.src_params.block_size.width != 0);
  128. UNIMPLEMENTED_IF(regs.src_params.layer != 0);
  129. const bool is_remapping = regs.launch_dma.remap_enable != 0;
  130. // Optimized path for micro copies.
  131. const size_t dst_size = static_cast<size_t>(regs.pitch_out) * regs.line_count;
  132. if (!is_remapping && dst_size < GOB_SIZE && regs.pitch_out <= GOB_SIZE_X &&
  133. regs.src_params.height > GOB_SIZE_Y) {
  134. FastCopyBlockLinearToPitch();
  135. return;
  136. }
  137. // Deswizzle the input and copy it over.
  138. const Parameters& src_params = regs.src_params;
  139. const u32 num_remap_components = regs.remap_const.num_dst_components_minus_one + 1;
  140. const u32 remap_components_size = regs.remap_const.component_size_minus_one + 1;
  141. const u32 base_bpp = !is_remapping ? 1U : num_remap_components * remap_components_size;
  142. u32 width = src_params.width;
  143. u32 x_elements = regs.line_length_in;
  144. u32 x_offset = src_params.origin.x;
  145. u32 bpp_shift = 0U;
  146. if (!is_remapping) {
  147. bpp_shift = Common::FoldRight(
  148. 4U, [](u32 x, u32 y) { return std::min(x, static_cast<u32>(std::countr_zero(y))); },
  149. width, x_elements, x_offset, static_cast<u32>(regs.offset_in));
  150. width >>= bpp_shift;
  151. x_elements >>= bpp_shift;
  152. x_offset >>= bpp_shift;
  153. }
  154. const u32 bytes_per_pixel = base_bpp << bpp_shift;
  155. const u32 height = src_params.height;
  156. const u32 depth = src_params.depth;
  157. const u32 block_height = src_params.block_size.height;
  158. const u32 block_depth = src_params.block_size.depth;
  159. const size_t src_size =
  160. CalculateSize(true, bytes_per_pixel, width, height, depth, block_height, block_depth);
  161. if (read_buffer.size() < src_size) {
  162. read_buffer.resize(src_size);
  163. }
  164. if (write_buffer.size() < dst_size) {
  165. write_buffer.resize(dst_size);
  166. }
  167. memory_manager.ReadBlock(regs.offset_in, read_buffer.data(), src_size);
  168. memory_manager.ReadBlock(regs.offset_out, write_buffer.data(), dst_size);
  169. UnswizzleSubrect(write_buffer, read_buffer, bytes_per_pixel, width, height, depth, x_offset,
  170. src_params.origin.y, x_elements, regs.line_count, block_height, block_depth,
  171. regs.pitch_out);
  172. memory_manager.WriteBlock(regs.offset_out, write_buffer.data(), dst_size);
  173. }
  174. void MaxwellDMA::CopyPitchToBlockLinear() {
  175. UNIMPLEMENTED_IF_MSG(regs.dst_params.block_size.width != 0, "Block width is not one");
  176. UNIMPLEMENTED_IF(regs.dst_params.layer != 0);
  177. const bool is_remapping = regs.launch_dma.remap_enable != 0;
  178. const u32 num_remap_components = regs.remap_const.num_dst_components_minus_one + 1;
  179. const u32 remap_components_size = regs.remap_const.component_size_minus_one + 1;
  180. const auto& dst_params = regs.dst_params;
  181. const u32 base_bpp = !is_remapping ? 1U : num_remap_components * remap_components_size;
  182. u32 width = dst_params.width;
  183. u32 x_elements = regs.line_length_in;
  184. u32 x_offset = dst_params.origin.x;
  185. u32 bpp_shift = 0U;
  186. if (!is_remapping) {
  187. bpp_shift = Common::FoldRight(
  188. 4U, [](u32 x, u32 y) { return std::min(x, static_cast<u32>(std::countr_zero(y))); },
  189. width, x_elements, x_offset, static_cast<u32>(regs.offset_out));
  190. width >>= bpp_shift;
  191. x_elements >>= bpp_shift;
  192. x_offset >>= bpp_shift;
  193. }
  194. const u32 bytes_per_pixel = base_bpp << bpp_shift;
  195. const u32 height = dst_params.height;
  196. const u32 depth = dst_params.depth;
  197. const u32 block_height = dst_params.block_size.height;
  198. const u32 block_depth = dst_params.block_size.depth;
  199. const size_t dst_size =
  200. CalculateSize(true, bytes_per_pixel, width, height, depth, block_height, block_depth);
  201. const size_t src_size = static_cast<size_t>(regs.pitch_in) * regs.line_count;
  202. if (read_buffer.size() < src_size) {
  203. read_buffer.resize(src_size);
  204. }
  205. if (write_buffer.size() < dst_size) {
  206. write_buffer.resize(dst_size);
  207. }
  208. memory_manager.ReadBlock(regs.offset_in, read_buffer.data(), src_size);
  209. if (Settings::IsGPULevelExtreme()) {
  210. memory_manager.ReadBlock(regs.offset_out, write_buffer.data(), dst_size);
  211. } else {
  212. memory_manager.ReadBlockUnsafe(regs.offset_out, write_buffer.data(), dst_size);
  213. }
  214. // If the input is linear and the output is tiled, swizzle the input and copy it over.
  215. SwizzleSubrect(write_buffer, read_buffer, bytes_per_pixel, width, height, depth, x_offset,
  216. dst_params.origin.y, x_elements, regs.line_count, block_height, block_depth,
  217. regs.pitch_in);
  218. memory_manager.WriteBlock(regs.offset_out, write_buffer.data(), dst_size);
  219. }
  220. void MaxwellDMA::FastCopyBlockLinearToPitch() {
  221. const u32 bytes_per_pixel = 1U;
  222. const size_t src_size = GOB_SIZE;
  223. const size_t dst_size = static_cast<size_t>(regs.pitch_out) * regs.line_count;
  224. u32 pos_x = regs.src_params.origin.x;
  225. u32 pos_y = regs.src_params.origin.y;
  226. const u64 offset = GetGOBOffset(regs.src_params.width, regs.src_params.height, pos_x, pos_y,
  227. regs.src_params.block_size.height, bytes_per_pixel);
  228. const u32 x_in_gob = 64 / bytes_per_pixel;
  229. pos_x = pos_x % x_in_gob;
  230. pos_y = pos_y % 8;
  231. if (read_buffer.size() < src_size) {
  232. read_buffer.resize(src_size);
  233. }
  234. if (write_buffer.size() < dst_size) {
  235. write_buffer.resize(dst_size);
  236. }
  237. if (Settings::IsGPULevelExtreme()) {
  238. memory_manager.ReadBlock(regs.offset_in + offset, read_buffer.data(), src_size);
  239. memory_manager.ReadBlock(regs.offset_out, write_buffer.data(), dst_size);
  240. } else {
  241. memory_manager.ReadBlockUnsafe(regs.offset_in + offset, read_buffer.data(), src_size);
  242. memory_manager.ReadBlockUnsafe(regs.offset_out, write_buffer.data(), dst_size);
  243. }
  244. UnswizzleSubrect(write_buffer, read_buffer, bytes_per_pixel, regs.src_params.width,
  245. regs.src_params.height, 1, pos_x, pos_y, regs.line_length_in, regs.line_count,
  246. regs.src_params.block_size.height, regs.src_params.block_size.depth,
  247. regs.pitch_out);
  248. memory_manager.WriteBlock(regs.offset_out, write_buffer.data(), dst_size);
  249. }
  250. void MaxwellDMA::CopyBlockLinearToBlockLinear() {
  251. UNIMPLEMENTED_IF(regs.src_params.block_size.width != 0);
  252. const bool is_remapping = regs.launch_dma.remap_enable != 0;
  253. // Deswizzle the input and copy it over.
  254. const Parameters& src = regs.src_params;
  255. const Parameters& dst = regs.dst_params;
  256. const u32 num_remap_components = regs.remap_const.num_dst_components_minus_one + 1;
  257. const u32 remap_components_size = regs.remap_const.component_size_minus_one + 1;
  258. const u32 base_bpp = !is_remapping ? 1U : num_remap_components * remap_components_size;
  259. u32 src_width = src.width;
  260. u32 dst_width = dst.width;
  261. u32 x_elements = regs.line_length_in;
  262. u32 src_x_offset = src.origin.x;
  263. u32 dst_x_offset = dst.origin.x;
  264. u32 bpp_shift = 0U;
  265. if (!is_remapping) {
  266. bpp_shift = Common::FoldRight(
  267. 4U, [](u32 x, u32 y) { return std::min(x, static_cast<u32>(std::countr_zero(y))); },
  268. src_width, dst_width, x_elements, src_x_offset, dst_x_offset,
  269. static_cast<u32>(regs.offset_in), static_cast<u32>(regs.offset_out));
  270. src_width >>= bpp_shift;
  271. dst_width >>= bpp_shift;
  272. x_elements >>= bpp_shift;
  273. src_x_offset >>= bpp_shift;
  274. dst_x_offset >>= bpp_shift;
  275. }
  276. const u32 bytes_per_pixel = base_bpp << bpp_shift;
  277. const size_t src_size = CalculateSize(true, bytes_per_pixel, src_width, src.height, src.depth,
  278. src.block_size.height, src.block_size.depth);
  279. const size_t dst_size = CalculateSize(true, bytes_per_pixel, dst_width, dst.height, dst.depth,
  280. dst.block_size.height, dst.block_size.depth);
  281. const u32 pitch = x_elements * bytes_per_pixel;
  282. const size_t mid_buffer_size = pitch * regs.line_count;
  283. if (read_buffer.size() < src_size) {
  284. read_buffer.resize(src_size);
  285. }
  286. if (write_buffer.size() < dst_size) {
  287. write_buffer.resize(dst_size);
  288. }
  289. intermediate_buffer.resize(mid_buffer_size);
  290. memory_manager.ReadBlock(regs.offset_in, read_buffer.data(), src_size);
  291. memory_manager.ReadBlock(regs.offset_out, write_buffer.data(), dst_size);
  292. UnswizzleSubrect(intermediate_buffer, read_buffer, bytes_per_pixel, src_width, src.height,
  293. src.depth, src_x_offset, src.origin.y, x_elements, regs.line_count,
  294. src.block_size.height, src.block_size.depth, pitch);
  295. SwizzleSubrect(write_buffer, intermediate_buffer, bytes_per_pixel, dst_width, dst.height,
  296. dst.depth, dst_x_offset, dst.origin.y, x_elements, regs.line_count,
  297. dst.block_size.height, dst.block_size.depth, pitch);
  298. memory_manager.WriteBlock(regs.offset_out, write_buffer.data(), dst_size);
  299. }
  300. void MaxwellDMA::ReleaseSemaphore() {
  301. const auto type = regs.launch_dma.semaphore_type;
  302. const GPUVAddr address = regs.semaphore.address;
  303. const u32 payload = regs.semaphore.payload;
  304. switch (type) {
  305. case LaunchDMA::SemaphoreType::NONE:
  306. break;
  307. case LaunchDMA::SemaphoreType::RELEASE_ONE_WORD_SEMAPHORE: {
  308. std::function<void()> operation(
  309. [this, address, payload] { memory_manager.Write<u32>(address, payload); });
  310. rasterizer->SignalFence(std::move(operation));
  311. break;
  312. }
  313. case LaunchDMA::SemaphoreType::RELEASE_FOUR_WORD_SEMAPHORE: {
  314. std::function<void()> operation([this, address, payload] {
  315. memory_manager.Write<u64>(address + sizeof(u64), system.GPU().GetTicks());
  316. memory_manager.Write<u64>(address, payload);
  317. });
  318. rasterizer->SignalFence(std::move(operation));
  319. break;
  320. }
  321. default:
  322. ASSERT_MSG(false, "Unknown semaphore type: {}", static_cast<u32>(type.Value()));
  323. break;
  324. }
  325. }
  326. } // namespace Tegra::Engines