buffer_cache.h 67 KB

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  1. // Copyright 2019 yuzu Emulator Project
  2. // Licensed under GPLv2 or any later version
  3. // Refer to the license.txt file included.
  4. #pragma once
  5. #include <algorithm>
  6. #include <array>
  7. #include <deque>
  8. #include <memory>
  9. #include <mutex>
  10. #include <numeric>
  11. #include <span>
  12. #include <unordered_map>
  13. #include <vector>
  14. #include <boost/container/small_vector.hpp>
  15. #include <boost/icl/interval_set.hpp>
  16. #include "common/common_types.h"
  17. #include "common/div_ceil.h"
  18. #include "common/literals.h"
  19. #include "common/lru_cache.h"
  20. #include "common/microprofile.h"
  21. #include "common/scope_exit.h"
  22. #include "common/settings.h"
  23. #include "core/memory.h"
  24. #include "video_core/buffer_cache/buffer_base.h"
  25. #include "video_core/delayed_destruction_ring.h"
  26. #include "video_core/dirty_flags.h"
  27. #include "video_core/engines/kepler_compute.h"
  28. #include "video_core/engines/maxwell_3d.h"
  29. #include "video_core/memory_manager.h"
  30. #include "video_core/rasterizer_interface.h"
  31. #include "video_core/surface.h"
  32. #include "video_core/texture_cache/slot_vector.h"
  33. #include "video_core/texture_cache/types.h"
  34. namespace VideoCommon {
  35. MICROPROFILE_DECLARE(GPU_PrepareBuffers);
  36. MICROPROFILE_DECLARE(GPU_BindUploadBuffers);
  37. MICROPROFILE_DECLARE(GPU_DownloadMemory);
  38. using BufferId = SlotId;
  39. using VideoCore::Surface::PixelFormat;
  40. using namespace Common::Literals;
  41. constexpr u32 NUM_VERTEX_BUFFERS = 32;
  42. constexpr u32 NUM_TRANSFORM_FEEDBACK_BUFFERS = 4;
  43. constexpr u32 NUM_GRAPHICS_UNIFORM_BUFFERS = 18;
  44. constexpr u32 NUM_COMPUTE_UNIFORM_BUFFERS = 8;
  45. constexpr u32 NUM_STORAGE_BUFFERS = 16;
  46. constexpr u32 NUM_TEXTURE_BUFFERS = 16;
  47. constexpr u32 NUM_STAGES = 5;
  48. using UniformBufferSizes = std::array<std::array<u32, NUM_GRAPHICS_UNIFORM_BUFFERS>, NUM_STAGES>;
  49. using ComputeUniformBufferSizes = std::array<u32, NUM_COMPUTE_UNIFORM_BUFFERS>;
  50. template <typename P>
  51. class BufferCache {
  52. // Page size for caching purposes.
  53. // This is unrelated to the CPU page size and it can be changed as it seems optimal.
  54. static constexpr u32 PAGE_BITS = 16;
  55. static constexpr u64 PAGE_SIZE = u64{1} << PAGE_BITS;
  56. static constexpr bool IS_OPENGL = P::IS_OPENGL;
  57. static constexpr bool HAS_PERSISTENT_UNIFORM_BUFFER_BINDINGS =
  58. P::HAS_PERSISTENT_UNIFORM_BUFFER_BINDINGS;
  59. static constexpr bool HAS_FULL_INDEX_AND_PRIMITIVE_SUPPORT =
  60. P::HAS_FULL_INDEX_AND_PRIMITIVE_SUPPORT;
  61. static constexpr bool NEEDS_BIND_UNIFORM_INDEX = P::NEEDS_BIND_UNIFORM_INDEX;
  62. static constexpr bool NEEDS_BIND_STORAGE_INDEX = P::NEEDS_BIND_STORAGE_INDEX;
  63. static constexpr bool USE_MEMORY_MAPS = P::USE_MEMORY_MAPS;
  64. static constexpr bool SEPARATE_IMAGE_BUFFERS_BINDINGS = P::SEPARATE_IMAGE_BUFFER_BINDINGS;
  65. static constexpr BufferId NULL_BUFFER_ID{0};
  66. static constexpr u64 EXPECTED_MEMORY = 256_MiB;
  67. static constexpr u64 CRITICAL_MEMORY = 1_GiB;
  68. using Maxwell = Tegra::Engines::Maxwell3D::Regs;
  69. using Runtime = typename P::Runtime;
  70. using Buffer = typename P::Buffer;
  71. using IntervalSet = boost::icl::interval_set<VAddr>;
  72. using IntervalType = typename IntervalSet::interval_type;
  73. struct Empty {};
  74. struct OverlapResult {
  75. std::vector<BufferId> ids;
  76. VAddr begin;
  77. VAddr end;
  78. bool has_stream_leap = false;
  79. };
  80. struct Binding {
  81. VAddr cpu_addr{};
  82. u32 size{};
  83. BufferId buffer_id;
  84. };
  85. struct TextureBufferBinding : Binding {
  86. PixelFormat format;
  87. };
  88. static constexpr Binding NULL_BINDING{
  89. .cpu_addr = 0,
  90. .size = 0,
  91. .buffer_id = NULL_BUFFER_ID,
  92. };
  93. public:
  94. static constexpr u32 DEFAULT_SKIP_CACHE_SIZE = static_cast<u32>(4_KiB);
  95. explicit BufferCache(VideoCore::RasterizerInterface& rasterizer_,
  96. Tegra::Engines::Maxwell3D& maxwell3d_,
  97. Tegra::Engines::KeplerCompute& kepler_compute_,
  98. Tegra::MemoryManager& gpu_memory_, Core::Memory::Memory& cpu_memory_,
  99. Runtime& runtime_);
  100. void TickFrame();
  101. void WriteMemory(VAddr cpu_addr, u64 size);
  102. void CachedWriteMemory(VAddr cpu_addr, u64 size);
  103. void DownloadMemory(VAddr cpu_addr, u64 size);
  104. void BindGraphicsUniformBuffer(size_t stage, u32 index, GPUVAddr gpu_addr, u32 size);
  105. void DisableGraphicsUniformBuffer(size_t stage, u32 index);
  106. void UpdateGraphicsBuffers(bool is_indexed);
  107. void UpdateComputeBuffers();
  108. void BindHostGeometryBuffers(bool is_indexed);
  109. void BindHostStageBuffers(size_t stage);
  110. void BindHostComputeBuffers();
  111. void SetUniformBuffersState(const std::array<u32, NUM_STAGES>& mask,
  112. const UniformBufferSizes* sizes);
  113. void SetComputeUniformBufferState(u32 mask, const ComputeUniformBufferSizes* sizes);
  114. void UnbindGraphicsStorageBuffers(size_t stage);
  115. void BindGraphicsStorageBuffer(size_t stage, size_t ssbo_index, u32 cbuf_index, u32 cbuf_offset,
  116. bool is_written);
  117. void UnbindGraphicsTextureBuffers(size_t stage);
  118. void BindGraphicsTextureBuffer(size_t stage, size_t tbo_index, GPUVAddr gpu_addr, u32 size,
  119. PixelFormat format, bool is_written, bool is_image);
  120. void UnbindComputeStorageBuffers();
  121. void BindComputeStorageBuffer(size_t ssbo_index, u32 cbuf_index, u32 cbuf_offset,
  122. bool is_written);
  123. void UnbindComputeTextureBuffers();
  124. void BindComputeTextureBuffer(size_t tbo_index, GPUVAddr gpu_addr, u32 size, PixelFormat format,
  125. bool is_written, bool is_image);
  126. void FlushCachedWrites();
  127. /// Return true when there are uncommitted buffers to be downloaded
  128. [[nodiscard]] bool HasUncommittedFlushes() const noexcept;
  129. void AccumulateFlushes();
  130. /// Return true when the caller should wait for async downloads
  131. [[nodiscard]] bool ShouldWaitAsyncFlushes() const noexcept;
  132. /// Commit asynchronous downloads
  133. void CommitAsyncFlushes();
  134. void CommitAsyncFlushesHigh();
  135. /// Pop asynchronous downloads
  136. void PopAsyncFlushes();
  137. bool DMACopy(GPUVAddr src_address, GPUVAddr dest_address, u64 amount);
  138. bool DMAClear(GPUVAddr src_address, u64 amount, u32 value);
  139. /// Return true when a CPU region is modified from the GPU
  140. [[nodiscard]] bool IsRegionGpuModified(VAddr addr, size_t size);
  141. /// Return true when a region is registered on the cache
  142. [[nodiscard]] bool IsRegionRegistered(VAddr addr, size_t size);
  143. /// Return true when a CPU region is modified from the CPU
  144. [[nodiscard]] bool IsRegionCpuModified(VAddr addr, size_t size);
  145. std::mutex mutex;
  146. Runtime& runtime;
  147. private:
  148. template <typename Func>
  149. static void ForEachEnabledBit(u32 enabled_mask, Func&& func) {
  150. for (u32 index = 0; enabled_mask != 0; ++index, enabled_mask >>= 1) {
  151. const int disabled_bits = std::countr_zero(enabled_mask);
  152. index += disabled_bits;
  153. enabled_mask >>= disabled_bits;
  154. func(index);
  155. }
  156. }
  157. template <typename Func>
  158. void ForEachBufferInRange(VAddr cpu_addr, u64 size, Func&& func) {
  159. const u64 page_end = Common::DivCeil(cpu_addr + size, PAGE_SIZE);
  160. for (u64 page = cpu_addr >> PAGE_BITS; page < page_end;) {
  161. const BufferId buffer_id = page_table[page];
  162. if (!buffer_id) {
  163. ++page;
  164. continue;
  165. }
  166. Buffer& buffer = slot_buffers[buffer_id];
  167. func(buffer_id, buffer);
  168. const VAddr end_addr = buffer.CpuAddr() + buffer.SizeBytes();
  169. page = Common::DivCeil(end_addr, PAGE_SIZE);
  170. }
  171. }
  172. template <typename Func>
  173. void ForEachWrittenRange(VAddr cpu_addr, u64 size, Func&& func) {
  174. const VAddr start_address = cpu_addr;
  175. const VAddr end_address = start_address + size;
  176. const VAddr search_base =
  177. static_cast<VAddr>(std::min<s64>(0LL, static_cast<s64>(start_address - size)));
  178. const IntervalType search_interval{search_base, search_base + 1};
  179. auto it = common_ranges.lower_bound(search_interval);
  180. if (it == common_ranges.end()) {
  181. it = common_ranges.begin();
  182. }
  183. for (; it != common_ranges.end(); it++) {
  184. VAddr inter_addr_end = it->upper();
  185. VAddr inter_addr = it->lower();
  186. if (inter_addr >= end_address) {
  187. break;
  188. }
  189. if (inter_addr_end <= start_address) {
  190. continue;
  191. }
  192. if (inter_addr_end > end_address) {
  193. inter_addr_end = end_address;
  194. }
  195. if (inter_addr < start_address) {
  196. inter_addr = start_address;
  197. }
  198. func(inter_addr, inter_addr_end);
  199. }
  200. }
  201. static bool IsRangeGranular(VAddr cpu_addr, size_t size) {
  202. return (cpu_addr & ~Core::Memory::PAGE_MASK) ==
  203. ((cpu_addr + size) & ~Core::Memory::PAGE_MASK);
  204. }
  205. void RunGarbageCollector();
  206. void BindHostIndexBuffer();
  207. void BindHostVertexBuffers();
  208. void BindHostGraphicsUniformBuffers(size_t stage);
  209. void BindHostGraphicsUniformBuffer(size_t stage, u32 index, u32 binding_index, bool needs_bind);
  210. void BindHostGraphicsStorageBuffers(size_t stage);
  211. void BindHostGraphicsTextureBuffers(size_t stage);
  212. void BindHostTransformFeedbackBuffers();
  213. void BindHostComputeUniformBuffers();
  214. void BindHostComputeStorageBuffers();
  215. void BindHostComputeTextureBuffers();
  216. void DoUpdateGraphicsBuffers(bool is_indexed);
  217. void DoUpdateComputeBuffers();
  218. void UpdateIndexBuffer();
  219. void UpdateVertexBuffers();
  220. void UpdateVertexBuffer(u32 index);
  221. void UpdateUniformBuffers(size_t stage);
  222. void UpdateStorageBuffers(size_t stage);
  223. void UpdateTextureBuffers(size_t stage);
  224. void UpdateTransformFeedbackBuffers();
  225. void UpdateTransformFeedbackBuffer(u32 index);
  226. void UpdateComputeUniformBuffers();
  227. void UpdateComputeStorageBuffers();
  228. void UpdateComputeTextureBuffers();
  229. void MarkWrittenBuffer(BufferId buffer_id, VAddr cpu_addr, u32 size);
  230. [[nodiscard]] BufferId FindBuffer(VAddr cpu_addr, u32 size);
  231. [[nodiscard]] OverlapResult ResolveOverlaps(VAddr cpu_addr, u32 wanted_size);
  232. void JoinOverlap(BufferId new_buffer_id, BufferId overlap_id, bool accumulate_stream_score);
  233. [[nodiscard]] BufferId CreateBuffer(VAddr cpu_addr, u32 wanted_size);
  234. void Register(BufferId buffer_id);
  235. void Unregister(BufferId buffer_id);
  236. template <bool insert>
  237. void ChangeRegister(BufferId buffer_id);
  238. void TouchBuffer(Buffer& buffer, BufferId buffer_id) noexcept;
  239. bool SynchronizeBuffer(Buffer& buffer, VAddr cpu_addr, u32 size);
  240. bool SynchronizeBufferImpl(Buffer& buffer, VAddr cpu_addr, u32 size);
  241. void UploadMemory(Buffer& buffer, u64 total_size_bytes, u64 largest_copy,
  242. std::span<BufferCopy> copies);
  243. void ImmediateUploadMemory(Buffer& buffer, u64 largest_copy,
  244. std::span<const BufferCopy> copies);
  245. void MappedUploadMemory(Buffer& buffer, u64 total_size_bytes, std::span<BufferCopy> copies);
  246. void DownloadBufferMemory(Buffer& buffer_id);
  247. void DownloadBufferMemory(Buffer& buffer_id, VAddr cpu_addr, u64 size);
  248. void DeleteBuffer(BufferId buffer_id);
  249. void NotifyBufferDeletion();
  250. [[nodiscard]] Binding StorageBufferBinding(GPUVAddr ssbo_addr) const;
  251. [[nodiscard]] TextureBufferBinding GetTextureBufferBinding(GPUVAddr gpu_addr, u32 size,
  252. PixelFormat format);
  253. [[nodiscard]] std::span<const u8> ImmediateBufferWithData(VAddr cpu_addr, size_t size);
  254. [[nodiscard]] std::span<u8> ImmediateBuffer(size_t wanted_capacity);
  255. [[nodiscard]] bool HasFastUniformBufferBound(size_t stage, u32 binding_index) const noexcept;
  256. void ClearDownload(IntervalType subtract_interval);
  257. VideoCore::RasterizerInterface& rasterizer;
  258. Tegra::Engines::Maxwell3D& maxwell3d;
  259. Tegra::Engines::KeplerCompute& kepler_compute;
  260. Tegra::MemoryManager& gpu_memory;
  261. Core::Memory::Memory& cpu_memory;
  262. SlotVector<Buffer> slot_buffers;
  263. DelayedDestructionRing<Buffer, 8> delayed_destruction_ring;
  264. u32 last_index_count = 0;
  265. Binding index_buffer;
  266. std::array<Binding, NUM_VERTEX_BUFFERS> vertex_buffers;
  267. std::array<std::array<Binding, NUM_GRAPHICS_UNIFORM_BUFFERS>, NUM_STAGES> uniform_buffers;
  268. std::array<std::array<Binding, NUM_STORAGE_BUFFERS>, NUM_STAGES> storage_buffers;
  269. std::array<std::array<TextureBufferBinding, NUM_TEXTURE_BUFFERS>, NUM_STAGES> texture_buffers;
  270. std::array<Binding, NUM_TRANSFORM_FEEDBACK_BUFFERS> transform_feedback_buffers;
  271. std::array<Binding, NUM_COMPUTE_UNIFORM_BUFFERS> compute_uniform_buffers;
  272. std::array<Binding, NUM_STORAGE_BUFFERS> compute_storage_buffers;
  273. std::array<TextureBufferBinding, NUM_TEXTURE_BUFFERS> compute_texture_buffers;
  274. std::array<u32, NUM_STAGES> enabled_uniform_buffer_masks{};
  275. u32 enabled_compute_uniform_buffer_mask = 0;
  276. const UniformBufferSizes* uniform_buffer_sizes{};
  277. const ComputeUniformBufferSizes* compute_uniform_buffer_sizes{};
  278. std::array<u32, NUM_STAGES> enabled_storage_buffers{};
  279. std::array<u32, NUM_STAGES> written_storage_buffers{};
  280. u32 enabled_compute_storage_buffers = 0;
  281. u32 written_compute_storage_buffers = 0;
  282. std::array<u32, NUM_STAGES> enabled_texture_buffers{};
  283. std::array<u32, NUM_STAGES> written_texture_buffers{};
  284. std::array<u32, NUM_STAGES> image_texture_buffers{};
  285. u32 enabled_compute_texture_buffers = 0;
  286. u32 written_compute_texture_buffers = 0;
  287. u32 image_compute_texture_buffers = 0;
  288. std::array<u32, 16> uniform_cache_hits{};
  289. std::array<u32, 16> uniform_cache_shots{};
  290. u32 uniform_buffer_skip_cache_size = DEFAULT_SKIP_CACHE_SIZE;
  291. bool has_deleted_buffers = false;
  292. std::conditional_t<HAS_PERSISTENT_UNIFORM_BUFFER_BINDINGS, std::array<u32, NUM_STAGES>, Empty>
  293. dirty_uniform_buffers{};
  294. std::conditional_t<IS_OPENGL, std::array<u32, NUM_STAGES>, Empty> fast_bound_uniform_buffers{};
  295. std::conditional_t<HAS_PERSISTENT_UNIFORM_BUFFER_BINDINGS,
  296. std::array<std::array<u32, NUM_GRAPHICS_UNIFORM_BUFFERS>, NUM_STAGES>, Empty>
  297. uniform_buffer_binding_sizes{};
  298. std::vector<BufferId> cached_write_buffer_ids;
  299. IntervalSet uncommitted_ranges;
  300. IntervalSet common_ranges;
  301. std::deque<IntervalSet> committed_ranges;
  302. size_t immediate_buffer_capacity = 0;
  303. std::unique_ptr<u8[]> immediate_buffer_alloc;
  304. struct LRUItemParams {
  305. using ObjectType = BufferId;
  306. using TickType = u64;
  307. };
  308. Common::LeastRecentlyUsedCache<LRUItemParams> lru_cache;
  309. u64 frame_tick = 0;
  310. u64 total_used_memory = 0;
  311. std::array<BufferId, ((1ULL << 39) >> PAGE_BITS)> page_table;
  312. };
  313. template <class P>
  314. BufferCache<P>::BufferCache(VideoCore::RasterizerInterface& rasterizer_,
  315. Tegra::Engines::Maxwell3D& maxwell3d_,
  316. Tegra::Engines::KeplerCompute& kepler_compute_,
  317. Tegra::MemoryManager& gpu_memory_, Core::Memory::Memory& cpu_memory_,
  318. Runtime& runtime_)
  319. : runtime{runtime_}, rasterizer{rasterizer_}, maxwell3d{maxwell3d_},
  320. kepler_compute{kepler_compute_}, gpu_memory{gpu_memory_}, cpu_memory{cpu_memory_} {
  321. // Ensure the first slot is used for the null buffer
  322. void(slot_buffers.insert(runtime, NullBufferParams{}));
  323. common_ranges.clear();
  324. }
  325. template <class P>
  326. void BufferCache<P>::RunGarbageCollector() {
  327. const bool aggressive_gc = total_used_memory >= CRITICAL_MEMORY;
  328. const u64 ticks_to_destroy = aggressive_gc ? 60 : 120;
  329. int num_iterations = aggressive_gc ? 64 : 32;
  330. const auto clean_up = [this, &num_iterations](BufferId buffer_id) {
  331. if (num_iterations == 0) {
  332. return true;
  333. }
  334. --num_iterations;
  335. auto& buffer = slot_buffers[buffer_id];
  336. DownloadBufferMemory(buffer);
  337. DeleteBuffer(buffer_id);
  338. return false;
  339. };
  340. lru_cache.ForEachItemBelow(frame_tick - ticks_to_destroy, clean_up);
  341. }
  342. template <class P>
  343. void BufferCache<P>::TickFrame() {
  344. // Calculate hits and shots and move hit bits to the right
  345. const u32 hits = std::reduce(uniform_cache_hits.begin(), uniform_cache_hits.end());
  346. const u32 shots = std::reduce(uniform_cache_shots.begin(), uniform_cache_shots.end());
  347. std::copy_n(uniform_cache_hits.begin(), uniform_cache_hits.size() - 1,
  348. uniform_cache_hits.begin() + 1);
  349. std::copy_n(uniform_cache_shots.begin(), uniform_cache_shots.size() - 1,
  350. uniform_cache_shots.begin() + 1);
  351. uniform_cache_hits[0] = 0;
  352. uniform_cache_shots[0] = 0;
  353. const bool skip_preferred = hits * 256 < shots * 251;
  354. uniform_buffer_skip_cache_size = skip_preferred ? DEFAULT_SKIP_CACHE_SIZE : 0;
  355. if (Settings::values.use_caches_gc.GetValue() && total_used_memory >= EXPECTED_MEMORY) {
  356. RunGarbageCollector();
  357. }
  358. ++frame_tick;
  359. delayed_destruction_ring.Tick();
  360. }
  361. template <class P>
  362. void BufferCache<P>::WriteMemory(VAddr cpu_addr, u64 size) {
  363. ForEachBufferInRange(cpu_addr, size, [&](BufferId, Buffer& buffer) {
  364. buffer.MarkRegionAsCpuModified(cpu_addr, size);
  365. });
  366. }
  367. template <class P>
  368. void BufferCache<P>::CachedWriteMemory(VAddr cpu_addr, u64 size) {
  369. ForEachBufferInRange(cpu_addr, size, [&](BufferId buffer_id, Buffer& buffer) {
  370. if (!buffer.HasCachedWrites()) {
  371. cached_write_buffer_ids.push_back(buffer_id);
  372. }
  373. buffer.CachedCpuWrite(cpu_addr, size);
  374. });
  375. }
  376. template <class P>
  377. void BufferCache<P>::DownloadMemory(VAddr cpu_addr, u64 size) {
  378. ForEachBufferInRange(cpu_addr, size, [&](BufferId, Buffer& buffer) {
  379. DownloadBufferMemory(buffer, cpu_addr, size);
  380. });
  381. }
  382. template <class P>
  383. void BufferCache<P>::ClearDownload(IntervalType subtract_interval) {
  384. uncommitted_ranges.subtract(subtract_interval);
  385. for (auto& interval_set : committed_ranges) {
  386. interval_set.subtract(subtract_interval);
  387. }
  388. }
  389. template <class P>
  390. bool BufferCache<P>::DMACopy(GPUVAddr src_address, GPUVAddr dest_address, u64 amount) {
  391. const std::optional<VAddr> cpu_src_address = gpu_memory.GpuToCpuAddress(src_address);
  392. const std::optional<VAddr> cpu_dest_address = gpu_memory.GpuToCpuAddress(dest_address);
  393. if (!cpu_src_address || !cpu_dest_address) {
  394. return false;
  395. }
  396. const bool source_dirty = IsRegionRegistered(*cpu_src_address, amount);
  397. const bool dest_dirty = IsRegionRegistered(*cpu_dest_address, amount);
  398. if (!source_dirty && !dest_dirty) {
  399. return false;
  400. }
  401. const IntervalType subtract_interval{*cpu_dest_address, *cpu_dest_address + amount};
  402. ClearDownload(subtract_interval);
  403. BufferId buffer_a;
  404. BufferId buffer_b;
  405. do {
  406. has_deleted_buffers = false;
  407. buffer_a = FindBuffer(*cpu_src_address, static_cast<u32>(amount));
  408. buffer_b = FindBuffer(*cpu_dest_address, static_cast<u32>(amount));
  409. } while (has_deleted_buffers);
  410. auto& src_buffer = slot_buffers[buffer_a];
  411. auto& dest_buffer = slot_buffers[buffer_b];
  412. SynchronizeBuffer(src_buffer, *cpu_src_address, static_cast<u32>(amount));
  413. SynchronizeBuffer(dest_buffer, *cpu_dest_address, static_cast<u32>(amount));
  414. std::array copies{BufferCopy{
  415. .src_offset = src_buffer.Offset(*cpu_src_address),
  416. .dst_offset = dest_buffer.Offset(*cpu_dest_address),
  417. .size = amount,
  418. }};
  419. boost::container::small_vector<IntervalType, 4> tmp_intervals;
  420. auto mirror = [&](VAddr base_address, VAddr base_address_end) {
  421. const u64 size = base_address_end - base_address;
  422. const VAddr diff = base_address - *cpu_src_address;
  423. const VAddr new_base_address = *cpu_dest_address + diff;
  424. const IntervalType add_interval{new_base_address, new_base_address + size};
  425. uncommitted_ranges.add(add_interval);
  426. tmp_intervals.push_back(add_interval);
  427. };
  428. ForEachWrittenRange(*cpu_src_address, amount, mirror);
  429. // This subtraction in this order is important for overlapping copies.
  430. common_ranges.subtract(subtract_interval);
  431. bool atleast_1_download = tmp_intervals.size() != 0;
  432. for (const IntervalType add_interval : tmp_intervals) {
  433. common_ranges.add(add_interval);
  434. }
  435. runtime.CopyBuffer(dest_buffer, src_buffer, copies);
  436. if (atleast_1_download) {
  437. dest_buffer.MarkRegionAsGpuModified(*cpu_dest_address, amount);
  438. }
  439. std::vector<u8> tmp_buffer(amount);
  440. cpu_memory.ReadBlockUnsafe(*cpu_src_address, tmp_buffer.data(), amount);
  441. cpu_memory.WriteBlockUnsafe(*cpu_dest_address, tmp_buffer.data(), amount);
  442. return true;
  443. }
  444. template <class P>
  445. bool BufferCache<P>::DMAClear(GPUVAddr dst_address, u64 amount, u32 value) {
  446. const std::optional<VAddr> cpu_dst_address = gpu_memory.GpuToCpuAddress(dst_address);
  447. if (!cpu_dst_address) {
  448. return false;
  449. }
  450. const bool dest_dirty = IsRegionRegistered(*cpu_dst_address, amount);
  451. if (!dest_dirty) {
  452. return false;
  453. }
  454. const size_t size = amount * sizeof(u32);
  455. const IntervalType subtract_interval{*cpu_dst_address, *cpu_dst_address + size};
  456. ClearDownload(subtract_interval);
  457. common_ranges.subtract(subtract_interval);
  458. const BufferId buffer = FindBuffer(*cpu_dst_address, static_cast<u32>(size));
  459. auto& dest_buffer = slot_buffers[buffer];
  460. const u32 offset = dest_buffer.Offset(*cpu_dst_address);
  461. runtime.ClearBuffer(dest_buffer, offset, size, value);
  462. return true;
  463. }
  464. template <class P>
  465. void BufferCache<P>::BindGraphicsUniformBuffer(size_t stage, u32 index, GPUVAddr gpu_addr,
  466. u32 size) {
  467. const std::optional<VAddr> cpu_addr = gpu_memory.GpuToCpuAddress(gpu_addr);
  468. const Binding binding{
  469. .cpu_addr = *cpu_addr,
  470. .size = size,
  471. .buffer_id = BufferId{},
  472. };
  473. uniform_buffers[stage][index] = binding;
  474. }
  475. template <class P>
  476. void BufferCache<P>::DisableGraphicsUniformBuffer(size_t stage, u32 index) {
  477. uniform_buffers[stage][index] = NULL_BINDING;
  478. }
  479. template <class P>
  480. void BufferCache<P>::UpdateGraphicsBuffers(bool is_indexed) {
  481. MICROPROFILE_SCOPE(GPU_PrepareBuffers);
  482. do {
  483. has_deleted_buffers = false;
  484. DoUpdateGraphicsBuffers(is_indexed);
  485. } while (has_deleted_buffers);
  486. }
  487. template <class P>
  488. void BufferCache<P>::UpdateComputeBuffers() {
  489. MICROPROFILE_SCOPE(GPU_PrepareBuffers);
  490. do {
  491. has_deleted_buffers = false;
  492. DoUpdateComputeBuffers();
  493. } while (has_deleted_buffers);
  494. }
  495. template <class P>
  496. void BufferCache<P>::BindHostGeometryBuffers(bool is_indexed) {
  497. MICROPROFILE_SCOPE(GPU_BindUploadBuffers);
  498. if (is_indexed) {
  499. BindHostIndexBuffer();
  500. } else if constexpr (!HAS_FULL_INDEX_AND_PRIMITIVE_SUPPORT) {
  501. const auto& regs = maxwell3d.regs;
  502. if (regs.draw.topology == Maxwell::PrimitiveTopology::Quads) {
  503. runtime.BindQuadArrayIndexBuffer(regs.vertex_buffer.first, regs.vertex_buffer.count);
  504. }
  505. }
  506. BindHostVertexBuffers();
  507. BindHostTransformFeedbackBuffers();
  508. }
  509. template <class P>
  510. void BufferCache<P>::BindHostStageBuffers(size_t stage) {
  511. MICROPROFILE_SCOPE(GPU_BindUploadBuffers);
  512. BindHostGraphicsUniformBuffers(stage);
  513. BindHostGraphicsStorageBuffers(stage);
  514. BindHostGraphicsTextureBuffers(stage);
  515. }
  516. template <class P>
  517. void BufferCache<P>::BindHostComputeBuffers() {
  518. MICROPROFILE_SCOPE(GPU_BindUploadBuffers);
  519. BindHostComputeUniformBuffers();
  520. BindHostComputeStorageBuffers();
  521. BindHostComputeTextureBuffers();
  522. }
  523. template <class P>
  524. void BufferCache<P>::SetUniformBuffersState(const std::array<u32, NUM_STAGES>& mask,
  525. const UniformBufferSizes* sizes) {
  526. if constexpr (HAS_PERSISTENT_UNIFORM_BUFFER_BINDINGS) {
  527. if (enabled_uniform_buffer_masks != mask) {
  528. if constexpr (IS_OPENGL) {
  529. fast_bound_uniform_buffers.fill(0);
  530. }
  531. dirty_uniform_buffers.fill(~u32{0});
  532. uniform_buffer_binding_sizes.fill({});
  533. }
  534. }
  535. enabled_uniform_buffer_masks = mask;
  536. uniform_buffer_sizes = sizes;
  537. }
  538. template <class P>
  539. void BufferCache<P>::SetComputeUniformBufferState(u32 mask,
  540. const ComputeUniformBufferSizes* sizes) {
  541. enabled_compute_uniform_buffer_mask = mask;
  542. compute_uniform_buffer_sizes = sizes;
  543. }
  544. template <class P>
  545. void BufferCache<P>::UnbindGraphicsStorageBuffers(size_t stage) {
  546. enabled_storage_buffers[stage] = 0;
  547. written_storage_buffers[stage] = 0;
  548. }
  549. template <class P>
  550. void BufferCache<P>::BindGraphicsStorageBuffer(size_t stage, size_t ssbo_index, u32 cbuf_index,
  551. u32 cbuf_offset, bool is_written) {
  552. enabled_storage_buffers[stage] |= 1U << ssbo_index;
  553. written_storage_buffers[stage] |= (is_written ? 1U : 0U) << ssbo_index;
  554. const auto& cbufs = maxwell3d.state.shader_stages[stage];
  555. const GPUVAddr ssbo_addr = cbufs.const_buffers[cbuf_index].address + cbuf_offset;
  556. storage_buffers[stage][ssbo_index] = StorageBufferBinding(ssbo_addr);
  557. }
  558. template <class P>
  559. void BufferCache<P>::UnbindGraphicsTextureBuffers(size_t stage) {
  560. enabled_texture_buffers[stage] = 0;
  561. written_texture_buffers[stage] = 0;
  562. image_texture_buffers[stage] = 0;
  563. }
  564. template <class P>
  565. void BufferCache<P>::BindGraphicsTextureBuffer(size_t stage, size_t tbo_index, GPUVAddr gpu_addr,
  566. u32 size, PixelFormat format, bool is_written,
  567. bool is_image) {
  568. enabled_texture_buffers[stage] |= 1U << tbo_index;
  569. written_texture_buffers[stage] |= (is_written ? 1U : 0U) << tbo_index;
  570. if constexpr (SEPARATE_IMAGE_BUFFERS_BINDINGS) {
  571. image_texture_buffers[stage] |= (is_image ? 1U : 0U) << tbo_index;
  572. }
  573. texture_buffers[stage][tbo_index] = GetTextureBufferBinding(gpu_addr, size, format);
  574. }
  575. template <class P>
  576. void BufferCache<P>::UnbindComputeStorageBuffers() {
  577. enabled_compute_storage_buffers = 0;
  578. written_compute_storage_buffers = 0;
  579. image_compute_texture_buffers = 0;
  580. }
  581. template <class P>
  582. void BufferCache<P>::BindComputeStorageBuffer(size_t ssbo_index, u32 cbuf_index, u32 cbuf_offset,
  583. bool is_written) {
  584. enabled_compute_storage_buffers |= 1U << ssbo_index;
  585. written_compute_storage_buffers |= (is_written ? 1U : 0U) << ssbo_index;
  586. const auto& launch_desc = kepler_compute.launch_description;
  587. ASSERT(((launch_desc.const_buffer_enable_mask >> cbuf_index) & 1) != 0);
  588. const auto& cbufs = launch_desc.const_buffer_config;
  589. const GPUVAddr ssbo_addr = cbufs[cbuf_index].Address() + cbuf_offset;
  590. compute_storage_buffers[ssbo_index] = StorageBufferBinding(ssbo_addr);
  591. }
  592. template <class P>
  593. void BufferCache<P>::UnbindComputeTextureBuffers() {
  594. enabled_compute_texture_buffers = 0;
  595. written_compute_texture_buffers = 0;
  596. image_compute_texture_buffers = 0;
  597. }
  598. template <class P>
  599. void BufferCache<P>::BindComputeTextureBuffer(size_t tbo_index, GPUVAddr gpu_addr, u32 size,
  600. PixelFormat format, bool is_written, bool is_image) {
  601. enabled_compute_texture_buffers |= 1U << tbo_index;
  602. written_compute_texture_buffers |= (is_written ? 1U : 0U) << tbo_index;
  603. if constexpr (SEPARATE_IMAGE_BUFFERS_BINDINGS) {
  604. image_compute_texture_buffers |= (is_image ? 1U : 0U) << tbo_index;
  605. }
  606. compute_texture_buffers[tbo_index] = GetTextureBufferBinding(gpu_addr, size, format);
  607. }
  608. template <class P>
  609. void BufferCache<P>::FlushCachedWrites() {
  610. for (const BufferId buffer_id : cached_write_buffer_ids) {
  611. slot_buffers[buffer_id].FlushCachedWrites();
  612. }
  613. cached_write_buffer_ids.clear();
  614. }
  615. template <class P>
  616. bool BufferCache<P>::HasUncommittedFlushes() const noexcept {
  617. return !uncommitted_ranges.empty() || !committed_ranges.empty();
  618. }
  619. template <class P>
  620. void BufferCache<P>::AccumulateFlushes() {
  621. if (Settings::values.gpu_accuracy.GetValue() != Settings::GPUAccuracy::High) {
  622. uncommitted_ranges.clear();
  623. return;
  624. }
  625. if (uncommitted_ranges.empty()) {
  626. return;
  627. }
  628. committed_ranges.emplace_back(std::move(uncommitted_ranges));
  629. }
  630. template <class P>
  631. bool BufferCache<P>::ShouldWaitAsyncFlushes() const noexcept {
  632. return false;
  633. }
  634. template <class P>
  635. void BufferCache<P>::CommitAsyncFlushesHigh() {
  636. AccumulateFlushes();
  637. if (committed_ranges.empty()) {
  638. return;
  639. }
  640. MICROPROFILE_SCOPE(GPU_DownloadMemory);
  641. boost::container::small_vector<std::pair<BufferCopy, BufferId>, 1> downloads;
  642. u64 total_size_bytes = 0;
  643. u64 largest_copy = 0;
  644. for (const IntervalSet& intervals : committed_ranges) {
  645. for (auto& interval : intervals) {
  646. const std::size_t size = interval.upper() - interval.lower();
  647. const VAddr cpu_addr = interval.lower();
  648. ForEachBufferInRange(cpu_addr, size, [&](BufferId buffer_id, Buffer& buffer) {
  649. buffer.ForEachDownloadRangeAndClear(
  650. cpu_addr, size, [&](u64 range_offset, u64 range_size) {
  651. const VAddr buffer_addr = buffer.CpuAddr();
  652. const auto add_download = [&](VAddr start, VAddr end) {
  653. const u64 new_offset = start - buffer_addr;
  654. const u64 new_size = end - start;
  655. downloads.push_back({
  656. BufferCopy{
  657. .src_offset = new_offset,
  658. .dst_offset = total_size_bytes,
  659. .size = new_size,
  660. },
  661. buffer_id,
  662. });
  663. // Align up to avoid cache conflicts
  664. constexpr u64 align = 256ULL;
  665. constexpr u64 mask = ~(align - 1ULL);
  666. total_size_bytes += (new_size + align - 1) & mask;
  667. largest_copy = std::max(largest_copy, new_size);
  668. };
  669. const VAddr start_address = buffer_addr + range_offset;
  670. const VAddr end_address = start_address + range_size;
  671. ForEachWrittenRange(start_address, range_size, add_download);
  672. const IntervalType subtract_interval{start_address, end_address};
  673. common_ranges.subtract(subtract_interval);
  674. });
  675. });
  676. }
  677. }
  678. committed_ranges.clear();
  679. if (downloads.empty()) {
  680. return;
  681. }
  682. if constexpr (USE_MEMORY_MAPS) {
  683. auto download_staging = runtime.DownloadStagingBuffer(total_size_bytes);
  684. for (auto& [copy, buffer_id] : downloads) {
  685. // Have in mind the staging buffer offset for the copy
  686. copy.dst_offset += download_staging.offset;
  687. const std::array copies{copy};
  688. runtime.CopyBuffer(download_staging.buffer, slot_buffers[buffer_id], copies);
  689. }
  690. runtime.Finish();
  691. for (const auto& [copy, buffer_id] : downloads) {
  692. const Buffer& buffer = slot_buffers[buffer_id];
  693. const VAddr cpu_addr = buffer.CpuAddr() + copy.src_offset;
  694. // Undo the modified offset
  695. const u64 dst_offset = copy.dst_offset - download_staging.offset;
  696. const u8* read_mapped_memory = download_staging.mapped_span.data() + dst_offset;
  697. cpu_memory.WriteBlockUnsafe(cpu_addr, read_mapped_memory, copy.size);
  698. }
  699. } else {
  700. const std::span<u8> immediate_buffer = ImmediateBuffer(largest_copy);
  701. for (const auto& [copy, buffer_id] : downloads) {
  702. Buffer& buffer = slot_buffers[buffer_id];
  703. buffer.ImmediateDownload(copy.src_offset, immediate_buffer.subspan(0, copy.size));
  704. const VAddr cpu_addr = buffer.CpuAddr() + copy.src_offset;
  705. cpu_memory.WriteBlockUnsafe(cpu_addr, immediate_buffer.data(), copy.size);
  706. }
  707. }
  708. }
  709. template <class P>
  710. void BufferCache<P>::CommitAsyncFlushes() {
  711. if (Settings::values.gpu_accuracy.GetValue() == Settings::GPUAccuracy::High) {
  712. CommitAsyncFlushesHigh();
  713. } else {
  714. uncommitted_ranges.clear();
  715. committed_ranges.clear();
  716. }
  717. }
  718. template <class P>
  719. void BufferCache<P>::PopAsyncFlushes() {}
  720. template <class P>
  721. bool BufferCache<P>::IsRegionGpuModified(VAddr addr, size_t size) {
  722. const u64 page_end = Common::DivCeil(addr + size, PAGE_SIZE);
  723. for (u64 page = addr >> PAGE_BITS; page < page_end;) {
  724. const BufferId image_id = page_table[page];
  725. if (!image_id) {
  726. ++page;
  727. continue;
  728. }
  729. Buffer& buffer = slot_buffers[image_id];
  730. if (buffer.IsRegionGpuModified(addr, size)) {
  731. return true;
  732. }
  733. const VAddr end_addr = buffer.CpuAddr() + buffer.SizeBytes();
  734. page = Common::DivCeil(end_addr, PAGE_SIZE);
  735. }
  736. return false;
  737. }
  738. template <class P>
  739. bool BufferCache<P>::IsRegionRegistered(VAddr addr, size_t size) {
  740. const VAddr end_addr = addr + size;
  741. const u64 page_end = Common::DivCeil(end_addr, PAGE_SIZE);
  742. for (u64 page = addr >> PAGE_BITS; page < page_end;) {
  743. const BufferId buffer_id = page_table[page];
  744. if (!buffer_id) {
  745. ++page;
  746. continue;
  747. }
  748. Buffer& buffer = slot_buffers[buffer_id];
  749. const VAddr buf_start_addr = buffer.CpuAddr();
  750. const VAddr buf_end_addr = buf_start_addr + buffer.SizeBytes();
  751. if (buf_start_addr < end_addr && addr < buf_end_addr) {
  752. return true;
  753. }
  754. page = Common::DivCeil(end_addr, PAGE_SIZE);
  755. }
  756. return false;
  757. }
  758. template <class P>
  759. bool BufferCache<P>::IsRegionCpuModified(VAddr addr, size_t size) {
  760. const u64 page_end = Common::DivCeil(addr + size, PAGE_SIZE);
  761. for (u64 page = addr >> PAGE_BITS; page < page_end;) {
  762. const BufferId image_id = page_table[page];
  763. if (!image_id) {
  764. ++page;
  765. continue;
  766. }
  767. Buffer& buffer = slot_buffers[image_id];
  768. if (buffer.IsRegionCpuModified(addr, size)) {
  769. return true;
  770. }
  771. const VAddr end_addr = buffer.CpuAddr() + buffer.SizeBytes();
  772. page = Common::DivCeil(end_addr, PAGE_SIZE);
  773. }
  774. return false;
  775. }
  776. template <class P>
  777. void BufferCache<P>::BindHostIndexBuffer() {
  778. Buffer& buffer = slot_buffers[index_buffer.buffer_id];
  779. TouchBuffer(buffer, index_buffer.buffer_id);
  780. const u32 offset = buffer.Offset(index_buffer.cpu_addr);
  781. const u32 size = index_buffer.size;
  782. SynchronizeBuffer(buffer, index_buffer.cpu_addr, size);
  783. if constexpr (HAS_FULL_INDEX_AND_PRIMITIVE_SUPPORT) {
  784. const u32 new_offset = offset + maxwell3d.regs.index_array.first *
  785. maxwell3d.regs.index_array.FormatSizeInBytes();
  786. runtime.BindIndexBuffer(buffer, new_offset, size);
  787. } else {
  788. runtime.BindIndexBuffer(maxwell3d.regs.draw.topology, maxwell3d.regs.index_array.format,
  789. maxwell3d.regs.index_array.first, maxwell3d.regs.index_array.count,
  790. buffer, offset, size);
  791. }
  792. }
  793. template <class P>
  794. void BufferCache<P>::BindHostVertexBuffers() {
  795. auto& flags = maxwell3d.dirty.flags;
  796. for (u32 index = 0; index < NUM_VERTEX_BUFFERS; ++index) {
  797. const Binding& binding = vertex_buffers[index];
  798. Buffer& buffer = slot_buffers[binding.buffer_id];
  799. TouchBuffer(buffer, binding.buffer_id);
  800. SynchronizeBuffer(buffer, binding.cpu_addr, binding.size);
  801. if (!flags[Dirty::VertexBuffer0 + index]) {
  802. continue;
  803. }
  804. flags[Dirty::VertexBuffer0 + index] = false;
  805. const u32 stride = maxwell3d.regs.vertex_array[index].stride;
  806. const u32 offset = buffer.Offset(binding.cpu_addr);
  807. runtime.BindVertexBuffer(index, buffer, offset, binding.size, stride);
  808. }
  809. }
  810. template <class P>
  811. void BufferCache<P>::BindHostGraphicsUniformBuffers(size_t stage) {
  812. u32 dirty = ~0U;
  813. if constexpr (HAS_PERSISTENT_UNIFORM_BUFFER_BINDINGS) {
  814. dirty = std::exchange(dirty_uniform_buffers[stage], 0);
  815. }
  816. u32 binding_index = 0;
  817. ForEachEnabledBit(enabled_uniform_buffer_masks[stage], [&](u32 index) {
  818. const bool needs_bind = ((dirty >> index) & 1) != 0;
  819. BindHostGraphicsUniformBuffer(stage, index, binding_index, needs_bind);
  820. if constexpr (NEEDS_BIND_UNIFORM_INDEX) {
  821. ++binding_index;
  822. }
  823. });
  824. }
  825. template <class P>
  826. void BufferCache<P>::BindHostGraphicsUniformBuffer(size_t stage, u32 index, u32 binding_index,
  827. bool needs_bind) {
  828. const Binding& binding = uniform_buffers[stage][index];
  829. const VAddr cpu_addr = binding.cpu_addr;
  830. const u32 size = std::min(binding.size, (*uniform_buffer_sizes)[stage][index]);
  831. Buffer& buffer = slot_buffers[binding.buffer_id];
  832. TouchBuffer(buffer, binding.buffer_id);
  833. const bool use_fast_buffer = binding.buffer_id != NULL_BUFFER_ID &&
  834. size <= uniform_buffer_skip_cache_size &&
  835. !buffer.IsRegionGpuModified(cpu_addr, size);
  836. if (use_fast_buffer) {
  837. if constexpr (IS_OPENGL) {
  838. if (runtime.HasFastBufferSubData()) {
  839. // Fast path for Nvidia
  840. const bool should_fast_bind =
  841. !HasFastUniformBufferBound(stage, binding_index) ||
  842. uniform_buffer_binding_sizes[stage][binding_index] != size;
  843. if (should_fast_bind) {
  844. // We only have to bind when the currently bound buffer is not the fast version
  845. fast_bound_uniform_buffers[stage] |= 1U << binding_index;
  846. uniform_buffer_binding_sizes[stage][binding_index] = size;
  847. runtime.BindFastUniformBuffer(stage, binding_index, size);
  848. }
  849. const auto span = ImmediateBufferWithData(cpu_addr, size);
  850. runtime.PushFastUniformBuffer(stage, binding_index, span);
  851. return;
  852. }
  853. }
  854. if constexpr (IS_OPENGL) {
  855. fast_bound_uniform_buffers[stage] |= 1U << binding_index;
  856. uniform_buffer_binding_sizes[stage][binding_index] = size;
  857. }
  858. // Stream buffer path to avoid stalling on non-Nvidia drivers or Vulkan
  859. const std::span<u8> span = runtime.BindMappedUniformBuffer(stage, binding_index, size);
  860. cpu_memory.ReadBlockUnsafe(cpu_addr, span.data(), size);
  861. return;
  862. }
  863. // Classic cached path
  864. const bool sync_cached = SynchronizeBuffer(buffer, cpu_addr, size);
  865. if (sync_cached) {
  866. ++uniform_cache_hits[0];
  867. }
  868. ++uniform_cache_shots[0];
  869. // Skip binding if it's not needed and if the bound buffer is not the fast version
  870. // This exists to avoid instances where the fast buffer is bound and a GPU write happens
  871. needs_bind |= HasFastUniformBufferBound(stage, binding_index);
  872. if constexpr (HAS_PERSISTENT_UNIFORM_BUFFER_BINDINGS) {
  873. needs_bind |= uniform_buffer_binding_sizes[stage][binding_index] != size;
  874. }
  875. if (!needs_bind) {
  876. return;
  877. }
  878. const u32 offset = buffer.Offset(cpu_addr);
  879. if constexpr (IS_OPENGL) {
  880. // Fast buffer will be unbound
  881. fast_bound_uniform_buffers[stage] &= ~(1U << binding_index);
  882. // Mark the index as dirty if offset doesn't match
  883. const bool is_copy_bind = offset != 0 && !runtime.SupportsNonZeroUniformOffset();
  884. dirty_uniform_buffers[stage] |= (is_copy_bind ? 1U : 0U) << index;
  885. }
  886. if constexpr (HAS_PERSISTENT_UNIFORM_BUFFER_BINDINGS) {
  887. uniform_buffer_binding_sizes[stage][binding_index] = size;
  888. }
  889. if constexpr (NEEDS_BIND_UNIFORM_INDEX) {
  890. runtime.BindUniformBuffer(stage, binding_index, buffer, offset, size);
  891. } else {
  892. runtime.BindUniformBuffer(buffer, offset, size);
  893. }
  894. }
  895. template <class P>
  896. void BufferCache<P>::BindHostGraphicsStorageBuffers(size_t stage) {
  897. u32 binding_index = 0;
  898. ForEachEnabledBit(enabled_storage_buffers[stage], [&](u32 index) {
  899. const Binding& binding = storage_buffers[stage][index];
  900. Buffer& buffer = slot_buffers[binding.buffer_id];
  901. TouchBuffer(buffer, binding.buffer_id);
  902. const u32 size = binding.size;
  903. SynchronizeBuffer(buffer, binding.cpu_addr, size);
  904. const u32 offset = buffer.Offset(binding.cpu_addr);
  905. const bool is_written = ((written_storage_buffers[stage] >> index) & 1) != 0;
  906. if constexpr (NEEDS_BIND_STORAGE_INDEX) {
  907. runtime.BindStorageBuffer(stage, binding_index, buffer, offset, size, is_written);
  908. ++binding_index;
  909. } else {
  910. runtime.BindStorageBuffer(buffer, offset, size, is_written);
  911. }
  912. });
  913. }
  914. template <class P>
  915. void BufferCache<P>::BindHostGraphicsTextureBuffers(size_t stage) {
  916. ForEachEnabledBit(enabled_texture_buffers[stage], [&](u32 index) {
  917. const TextureBufferBinding& binding = texture_buffers[stage][index];
  918. Buffer& buffer = slot_buffers[binding.buffer_id];
  919. const u32 size = binding.size;
  920. SynchronizeBuffer(buffer, binding.cpu_addr, size);
  921. const u32 offset = buffer.Offset(binding.cpu_addr);
  922. const PixelFormat format = binding.format;
  923. if constexpr (SEPARATE_IMAGE_BUFFERS_BINDINGS) {
  924. if (((image_texture_buffers[stage] >> index) & 1) != 0) {
  925. runtime.BindImageBuffer(buffer, offset, size, format);
  926. } else {
  927. runtime.BindTextureBuffer(buffer, offset, size, format);
  928. }
  929. } else {
  930. runtime.BindTextureBuffer(buffer, offset, size, format);
  931. }
  932. });
  933. }
  934. template <class P>
  935. void BufferCache<P>::BindHostTransformFeedbackBuffers() {
  936. if (maxwell3d.regs.tfb_enabled == 0) {
  937. return;
  938. }
  939. for (u32 index = 0; index < NUM_TRANSFORM_FEEDBACK_BUFFERS; ++index) {
  940. const Binding& binding = transform_feedback_buffers[index];
  941. Buffer& buffer = slot_buffers[binding.buffer_id];
  942. TouchBuffer(buffer, binding.buffer_id);
  943. const u32 size = binding.size;
  944. SynchronizeBuffer(buffer, binding.cpu_addr, size);
  945. const u32 offset = buffer.Offset(binding.cpu_addr);
  946. runtime.BindTransformFeedbackBuffer(index, buffer, offset, size);
  947. }
  948. }
  949. template <class P>
  950. void BufferCache<P>::BindHostComputeUniformBuffers() {
  951. if constexpr (HAS_PERSISTENT_UNIFORM_BUFFER_BINDINGS) {
  952. // Mark all uniform buffers as dirty
  953. dirty_uniform_buffers.fill(~u32{0});
  954. fast_bound_uniform_buffers.fill(0);
  955. }
  956. u32 binding_index = 0;
  957. ForEachEnabledBit(enabled_compute_uniform_buffer_mask, [&](u32 index) {
  958. const Binding& binding = compute_uniform_buffers[index];
  959. Buffer& buffer = slot_buffers[binding.buffer_id];
  960. TouchBuffer(buffer, binding.buffer_id);
  961. const u32 size = std::min(binding.size, (*compute_uniform_buffer_sizes)[index]);
  962. SynchronizeBuffer(buffer, binding.cpu_addr, size);
  963. const u32 offset = buffer.Offset(binding.cpu_addr);
  964. if constexpr (NEEDS_BIND_UNIFORM_INDEX) {
  965. runtime.BindComputeUniformBuffer(binding_index, buffer, offset, size);
  966. ++binding_index;
  967. } else {
  968. runtime.BindUniformBuffer(buffer, offset, size);
  969. }
  970. });
  971. }
  972. template <class P>
  973. void BufferCache<P>::BindHostComputeStorageBuffers() {
  974. u32 binding_index = 0;
  975. ForEachEnabledBit(enabled_compute_storage_buffers, [&](u32 index) {
  976. const Binding& binding = compute_storage_buffers[index];
  977. Buffer& buffer = slot_buffers[binding.buffer_id];
  978. TouchBuffer(buffer, binding.buffer_id);
  979. const u32 size = binding.size;
  980. SynchronizeBuffer(buffer, binding.cpu_addr, size);
  981. const u32 offset = buffer.Offset(binding.cpu_addr);
  982. const bool is_written = ((written_compute_storage_buffers >> index) & 1) != 0;
  983. if constexpr (NEEDS_BIND_STORAGE_INDEX) {
  984. runtime.BindComputeStorageBuffer(binding_index, buffer, offset, size, is_written);
  985. ++binding_index;
  986. } else {
  987. runtime.BindStorageBuffer(buffer, offset, size, is_written);
  988. }
  989. });
  990. }
  991. template <class P>
  992. void BufferCache<P>::BindHostComputeTextureBuffers() {
  993. ForEachEnabledBit(enabled_compute_texture_buffers, [&](u32 index) {
  994. const TextureBufferBinding& binding = compute_texture_buffers[index];
  995. Buffer& buffer = slot_buffers[binding.buffer_id];
  996. const u32 size = binding.size;
  997. SynchronizeBuffer(buffer, binding.cpu_addr, size);
  998. const u32 offset = buffer.Offset(binding.cpu_addr);
  999. const PixelFormat format = binding.format;
  1000. if constexpr (SEPARATE_IMAGE_BUFFERS_BINDINGS) {
  1001. if (((image_compute_texture_buffers >> index) & 1) != 0) {
  1002. runtime.BindImageBuffer(buffer, offset, size, format);
  1003. } else {
  1004. runtime.BindTextureBuffer(buffer, offset, size, format);
  1005. }
  1006. } else {
  1007. runtime.BindTextureBuffer(buffer, offset, size, format);
  1008. }
  1009. });
  1010. }
  1011. template <class P>
  1012. void BufferCache<P>::DoUpdateGraphicsBuffers(bool is_indexed) {
  1013. if (is_indexed) {
  1014. UpdateIndexBuffer();
  1015. }
  1016. UpdateVertexBuffers();
  1017. UpdateTransformFeedbackBuffers();
  1018. for (size_t stage = 0; stage < NUM_STAGES; ++stage) {
  1019. UpdateUniformBuffers(stage);
  1020. UpdateStorageBuffers(stage);
  1021. UpdateTextureBuffers(stage);
  1022. }
  1023. }
  1024. template <class P>
  1025. void BufferCache<P>::DoUpdateComputeBuffers() {
  1026. UpdateComputeUniformBuffers();
  1027. UpdateComputeStorageBuffers();
  1028. UpdateComputeTextureBuffers();
  1029. }
  1030. template <class P>
  1031. void BufferCache<P>::UpdateIndexBuffer() {
  1032. // We have to check for the dirty flags and index count
  1033. // The index count is currently changed without updating the dirty flags
  1034. const auto& index_array = maxwell3d.regs.index_array;
  1035. auto& flags = maxwell3d.dirty.flags;
  1036. if (!flags[Dirty::IndexBuffer] && last_index_count == index_array.count) {
  1037. return;
  1038. }
  1039. flags[Dirty::IndexBuffer] = false;
  1040. last_index_count = index_array.count;
  1041. const GPUVAddr gpu_addr_begin = index_array.StartAddress();
  1042. const GPUVAddr gpu_addr_end = index_array.EndAddress();
  1043. const std::optional<VAddr> cpu_addr = gpu_memory.GpuToCpuAddress(gpu_addr_begin);
  1044. const u32 address_size = static_cast<u32>(gpu_addr_end - gpu_addr_begin);
  1045. const u32 draw_size = (index_array.count + index_array.first) * index_array.FormatSizeInBytes();
  1046. const u32 size = std::min(address_size, draw_size);
  1047. if (size == 0 || !cpu_addr) {
  1048. index_buffer = NULL_BINDING;
  1049. return;
  1050. }
  1051. index_buffer = Binding{
  1052. .cpu_addr = *cpu_addr,
  1053. .size = size,
  1054. .buffer_id = FindBuffer(*cpu_addr, size),
  1055. };
  1056. }
  1057. template <class P>
  1058. void BufferCache<P>::UpdateVertexBuffers() {
  1059. auto& flags = maxwell3d.dirty.flags;
  1060. if (!maxwell3d.dirty.flags[Dirty::VertexBuffers]) {
  1061. return;
  1062. }
  1063. flags[Dirty::VertexBuffers] = false;
  1064. for (u32 index = 0; index < NUM_VERTEX_BUFFERS; ++index) {
  1065. UpdateVertexBuffer(index);
  1066. }
  1067. }
  1068. template <class P>
  1069. void BufferCache<P>::UpdateVertexBuffer(u32 index) {
  1070. if (!maxwell3d.dirty.flags[Dirty::VertexBuffer0 + index]) {
  1071. return;
  1072. }
  1073. const auto& array = maxwell3d.regs.vertex_array[index];
  1074. const auto& limit = maxwell3d.regs.vertex_array_limit[index];
  1075. const GPUVAddr gpu_addr_begin = array.StartAddress();
  1076. const GPUVAddr gpu_addr_end = limit.LimitAddress() + 1;
  1077. const std::optional<VAddr> cpu_addr = gpu_memory.GpuToCpuAddress(gpu_addr_begin);
  1078. const u32 address_size = static_cast<u32>(gpu_addr_end - gpu_addr_begin);
  1079. const u32 size = address_size; // TODO: Analyze stride and number of vertices
  1080. if (array.enable == 0 || size == 0 || !cpu_addr) {
  1081. vertex_buffers[index] = NULL_BINDING;
  1082. return;
  1083. }
  1084. vertex_buffers[index] = Binding{
  1085. .cpu_addr = *cpu_addr,
  1086. .size = size,
  1087. .buffer_id = FindBuffer(*cpu_addr, size),
  1088. };
  1089. }
  1090. template <class P>
  1091. void BufferCache<P>::UpdateUniformBuffers(size_t stage) {
  1092. ForEachEnabledBit(enabled_uniform_buffer_masks[stage], [&](u32 index) {
  1093. Binding& binding = uniform_buffers[stage][index];
  1094. if (binding.buffer_id) {
  1095. // Already updated
  1096. return;
  1097. }
  1098. // Mark as dirty
  1099. if constexpr (HAS_PERSISTENT_UNIFORM_BUFFER_BINDINGS) {
  1100. dirty_uniform_buffers[stage] |= 1U << index;
  1101. }
  1102. // Resolve buffer
  1103. binding.buffer_id = FindBuffer(binding.cpu_addr, binding.size);
  1104. });
  1105. }
  1106. template <class P>
  1107. void BufferCache<P>::UpdateStorageBuffers(size_t stage) {
  1108. const u32 written_mask = written_storage_buffers[stage];
  1109. ForEachEnabledBit(enabled_storage_buffers[stage], [&](u32 index) {
  1110. // Resolve buffer
  1111. Binding& binding = storage_buffers[stage][index];
  1112. const BufferId buffer_id = FindBuffer(binding.cpu_addr, binding.size);
  1113. binding.buffer_id = buffer_id;
  1114. // Mark buffer as written if needed
  1115. if (((written_mask >> index) & 1) != 0) {
  1116. MarkWrittenBuffer(buffer_id, binding.cpu_addr, binding.size);
  1117. }
  1118. });
  1119. }
  1120. template <class P>
  1121. void BufferCache<P>::UpdateTextureBuffers(size_t stage) {
  1122. ForEachEnabledBit(enabled_texture_buffers[stage], [&](u32 index) {
  1123. Binding& binding = texture_buffers[stage][index];
  1124. binding.buffer_id = FindBuffer(binding.cpu_addr, binding.size);
  1125. // Mark buffer as written if needed
  1126. if (((written_texture_buffers[stage] >> index) & 1) != 0) {
  1127. MarkWrittenBuffer(binding.buffer_id, binding.cpu_addr, binding.size);
  1128. }
  1129. });
  1130. }
  1131. template <class P>
  1132. void BufferCache<P>::UpdateTransformFeedbackBuffers() {
  1133. if (maxwell3d.regs.tfb_enabled == 0) {
  1134. return;
  1135. }
  1136. for (u32 index = 0; index < NUM_TRANSFORM_FEEDBACK_BUFFERS; ++index) {
  1137. UpdateTransformFeedbackBuffer(index);
  1138. }
  1139. }
  1140. template <class P>
  1141. void BufferCache<P>::UpdateTransformFeedbackBuffer(u32 index) {
  1142. const auto& binding = maxwell3d.regs.tfb_bindings[index];
  1143. const GPUVAddr gpu_addr = binding.Address() + binding.buffer_offset;
  1144. const u32 size = binding.buffer_size;
  1145. const std::optional<VAddr> cpu_addr = gpu_memory.GpuToCpuAddress(gpu_addr);
  1146. if (binding.buffer_enable == 0 || size == 0 || !cpu_addr) {
  1147. transform_feedback_buffers[index] = NULL_BINDING;
  1148. return;
  1149. }
  1150. const BufferId buffer_id = FindBuffer(*cpu_addr, size);
  1151. transform_feedback_buffers[index] = Binding{
  1152. .cpu_addr = *cpu_addr,
  1153. .size = size,
  1154. .buffer_id = buffer_id,
  1155. };
  1156. MarkWrittenBuffer(buffer_id, *cpu_addr, size);
  1157. }
  1158. template <class P>
  1159. void BufferCache<P>::UpdateComputeUniformBuffers() {
  1160. ForEachEnabledBit(enabled_compute_uniform_buffer_mask, [&](u32 index) {
  1161. Binding& binding = compute_uniform_buffers[index];
  1162. binding = NULL_BINDING;
  1163. const auto& launch_desc = kepler_compute.launch_description;
  1164. if (((launch_desc.const_buffer_enable_mask >> index) & 1) != 0) {
  1165. const auto& cbuf = launch_desc.const_buffer_config[index];
  1166. const std::optional<VAddr> cpu_addr = gpu_memory.GpuToCpuAddress(cbuf.Address());
  1167. if (cpu_addr) {
  1168. binding.cpu_addr = *cpu_addr;
  1169. binding.size = cbuf.size;
  1170. }
  1171. }
  1172. binding.buffer_id = FindBuffer(binding.cpu_addr, binding.size);
  1173. });
  1174. }
  1175. template <class P>
  1176. void BufferCache<P>::UpdateComputeStorageBuffers() {
  1177. ForEachEnabledBit(enabled_compute_storage_buffers, [&](u32 index) {
  1178. // Resolve buffer
  1179. Binding& binding = compute_storage_buffers[index];
  1180. binding.buffer_id = FindBuffer(binding.cpu_addr, binding.size);
  1181. // Mark as written if needed
  1182. if (((written_compute_storage_buffers >> index) & 1) != 0) {
  1183. MarkWrittenBuffer(binding.buffer_id, binding.cpu_addr, binding.size);
  1184. }
  1185. });
  1186. }
  1187. template <class P>
  1188. void BufferCache<P>::UpdateComputeTextureBuffers() {
  1189. ForEachEnabledBit(enabled_compute_texture_buffers, [&](u32 index) {
  1190. Binding& binding = compute_texture_buffers[index];
  1191. binding.buffer_id = FindBuffer(binding.cpu_addr, binding.size);
  1192. // Mark as written if needed
  1193. if (((written_compute_texture_buffers >> index) & 1) != 0) {
  1194. MarkWrittenBuffer(binding.buffer_id, binding.cpu_addr, binding.size);
  1195. }
  1196. });
  1197. }
  1198. template <class P>
  1199. void BufferCache<P>::MarkWrittenBuffer(BufferId buffer_id, VAddr cpu_addr, u32 size) {
  1200. Buffer& buffer = slot_buffers[buffer_id];
  1201. buffer.MarkRegionAsGpuModified(cpu_addr, size);
  1202. const IntervalType base_interval{cpu_addr, cpu_addr + size};
  1203. common_ranges.add(base_interval);
  1204. const bool is_accuracy_high =
  1205. Settings::values.gpu_accuracy.GetValue() == Settings::GPUAccuracy::High;
  1206. const bool is_async = Settings::values.use_asynchronous_gpu_emulation.GetValue();
  1207. if (!is_async && !is_accuracy_high) {
  1208. return;
  1209. }
  1210. uncommitted_ranges.add(base_interval);
  1211. }
  1212. template <class P>
  1213. BufferId BufferCache<P>::FindBuffer(VAddr cpu_addr, u32 size) {
  1214. if (cpu_addr == 0) {
  1215. return NULL_BUFFER_ID;
  1216. }
  1217. const u64 page = cpu_addr >> PAGE_BITS;
  1218. const BufferId buffer_id = page_table[page];
  1219. if (!buffer_id) {
  1220. return CreateBuffer(cpu_addr, size);
  1221. }
  1222. const Buffer& buffer = slot_buffers[buffer_id];
  1223. if (buffer.IsInBounds(cpu_addr, size)) {
  1224. return buffer_id;
  1225. }
  1226. return CreateBuffer(cpu_addr, size);
  1227. }
  1228. template <class P>
  1229. typename BufferCache<P>::OverlapResult BufferCache<P>::ResolveOverlaps(VAddr cpu_addr,
  1230. u32 wanted_size) {
  1231. static constexpr int STREAM_LEAP_THRESHOLD = 16;
  1232. std::vector<BufferId> overlap_ids;
  1233. VAddr begin = cpu_addr;
  1234. VAddr end = cpu_addr + wanted_size;
  1235. int stream_score = 0;
  1236. bool has_stream_leap = false;
  1237. for (; cpu_addr >> PAGE_BITS < Common::DivCeil(end, PAGE_SIZE); cpu_addr += PAGE_SIZE) {
  1238. const BufferId overlap_id = page_table[cpu_addr >> PAGE_BITS];
  1239. if (!overlap_id) {
  1240. continue;
  1241. }
  1242. Buffer& overlap = slot_buffers[overlap_id];
  1243. if (overlap.IsPicked()) {
  1244. continue;
  1245. }
  1246. overlap_ids.push_back(overlap_id);
  1247. overlap.Pick();
  1248. const VAddr overlap_cpu_addr = overlap.CpuAddr();
  1249. if (overlap_cpu_addr < begin) {
  1250. cpu_addr = begin = overlap_cpu_addr;
  1251. }
  1252. end = std::max(end, overlap_cpu_addr + overlap.SizeBytes());
  1253. stream_score += overlap.StreamScore();
  1254. if (stream_score > STREAM_LEAP_THRESHOLD && !has_stream_leap) {
  1255. // When this memory region has been joined a bunch of times, we assume it's being used
  1256. // as a stream buffer. Increase the size to skip constantly recreating buffers.
  1257. has_stream_leap = true;
  1258. end += PAGE_SIZE * 256;
  1259. }
  1260. }
  1261. return OverlapResult{
  1262. .ids = std::move(overlap_ids),
  1263. .begin = begin,
  1264. .end = end,
  1265. .has_stream_leap = has_stream_leap,
  1266. };
  1267. }
  1268. template <class P>
  1269. void BufferCache<P>::JoinOverlap(BufferId new_buffer_id, BufferId overlap_id,
  1270. bool accumulate_stream_score) {
  1271. Buffer& new_buffer = slot_buffers[new_buffer_id];
  1272. Buffer& overlap = slot_buffers[overlap_id];
  1273. if (accumulate_stream_score) {
  1274. new_buffer.IncreaseStreamScore(overlap.StreamScore() + 1);
  1275. }
  1276. std::vector<BufferCopy> copies;
  1277. const size_t dst_base_offset = overlap.CpuAddr() - new_buffer.CpuAddr();
  1278. overlap.ForEachDownloadRange([&](u64 begin, u64 range_size) {
  1279. copies.push_back(BufferCopy{
  1280. .src_offset = begin,
  1281. .dst_offset = dst_base_offset + begin,
  1282. .size = range_size,
  1283. });
  1284. new_buffer.UnmarkRegionAsCpuModified(begin, range_size);
  1285. new_buffer.MarkRegionAsGpuModified(begin, range_size);
  1286. });
  1287. if (!copies.empty()) {
  1288. runtime.CopyBuffer(slot_buffers[new_buffer_id], overlap, copies);
  1289. }
  1290. DeleteBuffer(overlap_id);
  1291. }
  1292. template <class P>
  1293. BufferId BufferCache<P>::CreateBuffer(VAddr cpu_addr, u32 wanted_size) {
  1294. const OverlapResult overlap = ResolveOverlaps(cpu_addr, wanted_size);
  1295. const u32 size = static_cast<u32>(overlap.end - overlap.begin);
  1296. const BufferId new_buffer_id = slot_buffers.insert(runtime, rasterizer, overlap.begin, size);
  1297. for (const BufferId overlap_id : overlap.ids) {
  1298. JoinOverlap(new_buffer_id, overlap_id, !overlap.has_stream_leap);
  1299. }
  1300. Register(new_buffer_id);
  1301. TouchBuffer(slot_buffers[new_buffer_id], new_buffer_id);
  1302. return new_buffer_id;
  1303. }
  1304. template <class P>
  1305. void BufferCache<P>::Register(BufferId buffer_id) {
  1306. ChangeRegister<true>(buffer_id);
  1307. }
  1308. template <class P>
  1309. void BufferCache<P>::Unregister(BufferId buffer_id) {
  1310. ChangeRegister<false>(buffer_id);
  1311. }
  1312. template <class P>
  1313. template <bool insert>
  1314. void BufferCache<P>::ChangeRegister(BufferId buffer_id) {
  1315. Buffer& buffer = slot_buffers[buffer_id];
  1316. const auto size = buffer.SizeBytes();
  1317. if (insert) {
  1318. total_used_memory += Common::AlignUp(size, 1024);
  1319. buffer.lru_id = lru_cache.Insert(buffer_id, frame_tick);
  1320. } else {
  1321. total_used_memory -= Common::AlignUp(size, 1024);
  1322. lru_cache.Free(buffer.lru_id);
  1323. }
  1324. const VAddr cpu_addr_begin = buffer.CpuAddr();
  1325. const VAddr cpu_addr_end = cpu_addr_begin + size;
  1326. const u64 page_begin = cpu_addr_begin / PAGE_SIZE;
  1327. const u64 page_end = Common::DivCeil(cpu_addr_end, PAGE_SIZE);
  1328. for (u64 page = page_begin; page != page_end; ++page) {
  1329. if constexpr (insert) {
  1330. page_table[page] = buffer_id;
  1331. } else {
  1332. page_table[page] = BufferId{};
  1333. }
  1334. }
  1335. }
  1336. template <class P>
  1337. void BufferCache<P>::TouchBuffer(Buffer& buffer, BufferId buffer_id) noexcept {
  1338. if (buffer_id != NULL_BUFFER_ID) {
  1339. lru_cache.Touch(buffer.lru_id, frame_tick);
  1340. }
  1341. }
  1342. template <class P>
  1343. bool BufferCache<P>::SynchronizeBuffer(Buffer& buffer, VAddr cpu_addr, u32 size) {
  1344. if (buffer.CpuAddr() == 0) {
  1345. return true;
  1346. }
  1347. return SynchronizeBufferImpl(buffer, cpu_addr, size);
  1348. }
  1349. template <class P>
  1350. bool BufferCache<P>::SynchronizeBufferImpl(Buffer& buffer, VAddr cpu_addr, u32 size) {
  1351. boost::container::small_vector<BufferCopy, 4> copies;
  1352. u64 total_size_bytes = 0;
  1353. u64 largest_copy = 0;
  1354. buffer.ForEachUploadRange(cpu_addr, size, [&](u64 range_offset, u64 range_size) {
  1355. copies.push_back(BufferCopy{
  1356. .src_offset = total_size_bytes,
  1357. .dst_offset = range_offset,
  1358. .size = range_size,
  1359. });
  1360. total_size_bytes += range_size;
  1361. largest_copy = std::max(largest_copy, range_size);
  1362. });
  1363. if (total_size_bytes == 0) {
  1364. return true;
  1365. }
  1366. const std::span<BufferCopy> copies_span(copies.data(), copies.size());
  1367. UploadMemory(buffer, total_size_bytes, largest_copy, copies_span);
  1368. return false;
  1369. }
  1370. template <class P>
  1371. void BufferCache<P>::UploadMemory(Buffer& buffer, u64 total_size_bytes, u64 largest_copy,
  1372. std::span<BufferCopy> copies) {
  1373. if constexpr (USE_MEMORY_MAPS) {
  1374. MappedUploadMemory(buffer, total_size_bytes, copies);
  1375. } else {
  1376. ImmediateUploadMemory(buffer, largest_copy, copies);
  1377. }
  1378. }
  1379. template <class P>
  1380. void BufferCache<P>::ImmediateUploadMemory(Buffer& buffer, u64 largest_copy,
  1381. std::span<const BufferCopy> copies) {
  1382. std::span<u8> immediate_buffer;
  1383. for (const BufferCopy& copy : copies) {
  1384. std::span<const u8> upload_span;
  1385. const VAddr cpu_addr = buffer.CpuAddr() + copy.dst_offset;
  1386. if (IsRangeGranular(cpu_addr, copy.size)) {
  1387. upload_span = std::span(cpu_memory.GetPointer(cpu_addr), copy.size);
  1388. } else {
  1389. if (immediate_buffer.empty()) {
  1390. immediate_buffer = ImmediateBuffer(largest_copy);
  1391. }
  1392. cpu_memory.ReadBlockUnsafe(cpu_addr, immediate_buffer.data(), copy.size);
  1393. upload_span = immediate_buffer.subspan(0, copy.size);
  1394. }
  1395. buffer.ImmediateUpload(copy.dst_offset, upload_span);
  1396. }
  1397. }
  1398. template <class P>
  1399. void BufferCache<P>::MappedUploadMemory(Buffer& buffer, u64 total_size_bytes,
  1400. std::span<BufferCopy> copies) {
  1401. auto upload_staging = runtime.UploadStagingBuffer(total_size_bytes);
  1402. const std::span<u8> staging_pointer = upload_staging.mapped_span;
  1403. for (BufferCopy& copy : copies) {
  1404. u8* const src_pointer = staging_pointer.data() + copy.src_offset;
  1405. const VAddr cpu_addr = buffer.CpuAddr() + copy.dst_offset;
  1406. cpu_memory.ReadBlockUnsafe(cpu_addr, src_pointer, copy.size);
  1407. // Apply the staging offset
  1408. copy.src_offset += upload_staging.offset;
  1409. }
  1410. runtime.CopyBuffer(buffer, upload_staging.buffer, copies);
  1411. }
  1412. template <class P>
  1413. void BufferCache<P>::DownloadBufferMemory(Buffer& buffer) {
  1414. DownloadBufferMemory(buffer, buffer.CpuAddr(), buffer.SizeBytes());
  1415. }
  1416. template <class P>
  1417. void BufferCache<P>::DownloadBufferMemory(Buffer& buffer, VAddr cpu_addr, u64 size) {
  1418. boost::container::small_vector<BufferCopy, 1> copies;
  1419. u64 total_size_bytes = 0;
  1420. u64 largest_copy = 0;
  1421. buffer.ForEachDownloadRangeAndClear(cpu_addr, size, [&](u64 range_offset, u64 range_size) {
  1422. const VAddr buffer_addr = buffer.CpuAddr();
  1423. const auto add_download = [&](VAddr start, VAddr end) {
  1424. const u64 new_offset = start - buffer_addr;
  1425. const u64 new_size = end - start;
  1426. copies.push_back(BufferCopy{
  1427. .src_offset = new_offset,
  1428. .dst_offset = total_size_bytes,
  1429. .size = new_size,
  1430. });
  1431. // Align up to avoid cache conflicts
  1432. constexpr u64 align = 256ULL;
  1433. constexpr u64 mask = ~(align - 1ULL);
  1434. total_size_bytes += (new_size + align - 1) & mask;
  1435. largest_copy = std::max(largest_copy, new_size);
  1436. };
  1437. const VAddr start_address = buffer_addr + range_offset;
  1438. const VAddr end_address = start_address + range_size;
  1439. ForEachWrittenRange(start_address, range_size, add_download);
  1440. const IntervalType subtract_interval{start_address, end_address};
  1441. ClearDownload(subtract_interval);
  1442. common_ranges.subtract(subtract_interval);
  1443. });
  1444. if (total_size_bytes == 0) {
  1445. return;
  1446. }
  1447. MICROPROFILE_SCOPE(GPU_DownloadMemory);
  1448. if constexpr (USE_MEMORY_MAPS) {
  1449. auto download_staging = runtime.DownloadStagingBuffer(total_size_bytes);
  1450. const u8* const mapped_memory = download_staging.mapped_span.data();
  1451. const std::span<BufferCopy> copies_span(copies.data(), copies.data() + copies.size());
  1452. for (BufferCopy& copy : copies) {
  1453. // Modify copies to have the staging offset in mind
  1454. copy.dst_offset += download_staging.offset;
  1455. }
  1456. runtime.CopyBuffer(download_staging.buffer, buffer, copies_span);
  1457. runtime.Finish();
  1458. for (const BufferCopy& copy : copies) {
  1459. const VAddr copy_cpu_addr = buffer.CpuAddr() + copy.src_offset;
  1460. // Undo the modified offset
  1461. const u64 dst_offset = copy.dst_offset - download_staging.offset;
  1462. const u8* copy_mapped_memory = mapped_memory + dst_offset;
  1463. cpu_memory.WriteBlockUnsafe(copy_cpu_addr, copy_mapped_memory, copy.size);
  1464. }
  1465. } else {
  1466. const std::span<u8> immediate_buffer = ImmediateBuffer(largest_copy);
  1467. for (const BufferCopy& copy : copies) {
  1468. buffer.ImmediateDownload(copy.src_offset, immediate_buffer.subspan(0, copy.size));
  1469. const VAddr copy_cpu_addr = buffer.CpuAddr() + copy.src_offset;
  1470. cpu_memory.WriteBlockUnsafe(copy_cpu_addr, immediate_buffer.data(), copy.size);
  1471. }
  1472. }
  1473. }
  1474. template <class P>
  1475. void BufferCache<P>::DeleteBuffer(BufferId buffer_id) {
  1476. const auto scalar_replace = [buffer_id](Binding& binding) {
  1477. if (binding.buffer_id == buffer_id) {
  1478. binding.buffer_id = BufferId{};
  1479. }
  1480. };
  1481. const auto replace = [scalar_replace](std::span<Binding> bindings) {
  1482. std::ranges::for_each(bindings, scalar_replace);
  1483. };
  1484. scalar_replace(index_buffer);
  1485. replace(vertex_buffers);
  1486. std::ranges::for_each(uniform_buffers, replace);
  1487. std::ranges::for_each(storage_buffers, replace);
  1488. replace(transform_feedback_buffers);
  1489. replace(compute_uniform_buffers);
  1490. replace(compute_storage_buffers);
  1491. std::erase(cached_write_buffer_ids, buffer_id);
  1492. // Mark the whole buffer as CPU written to stop tracking CPU writes
  1493. Buffer& buffer = slot_buffers[buffer_id];
  1494. buffer.MarkRegionAsCpuModified(buffer.CpuAddr(), buffer.SizeBytes());
  1495. Unregister(buffer_id);
  1496. delayed_destruction_ring.Push(std::move(slot_buffers[buffer_id]));
  1497. slot_buffers.erase(buffer_id);
  1498. NotifyBufferDeletion();
  1499. }
  1500. template <class P>
  1501. void BufferCache<P>::NotifyBufferDeletion() {
  1502. if constexpr (HAS_PERSISTENT_UNIFORM_BUFFER_BINDINGS) {
  1503. dirty_uniform_buffers.fill(~u32{0});
  1504. uniform_buffer_binding_sizes.fill({});
  1505. }
  1506. auto& flags = maxwell3d.dirty.flags;
  1507. flags[Dirty::IndexBuffer] = true;
  1508. flags[Dirty::VertexBuffers] = true;
  1509. for (u32 index = 0; index < NUM_VERTEX_BUFFERS; ++index) {
  1510. flags[Dirty::VertexBuffer0 + index] = true;
  1511. }
  1512. has_deleted_buffers = true;
  1513. }
  1514. template <class P>
  1515. typename BufferCache<P>::Binding BufferCache<P>::StorageBufferBinding(GPUVAddr ssbo_addr) const {
  1516. const GPUVAddr gpu_addr = gpu_memory.Read<u64>(ssbo_addr);
  1517. const u32 size = gpu_memory.Read<u32>(ssbo_addr + 8);
  1518. const std::optional<VAddr> cpu_addr = gpu_memory.GpuToCpuAddress(gpu_addr);
  1519. if (!cpu_addr || size == 0) {
  1520. return NULL_BINDING;
  1521. }
  1522. const Binding binding{
  1523. .cpu_addr = *cpu_addr,
  1524. .size = size,
  1525. .buffer_id = BufferId{},
  1526. };
  1527. return binding;
  1528. }
  1529. template <class P>
  1530. typename BufferCache<P>::TextureBufferBinding BufferCache<P>::GetTextureBufferBinding(
  1531. GPUVAddr gpu_addr, u32 size, PixelFormat format) {
  1532. const std::optional<VAddr> cpu_addr = gpu_memory.GpuToCpuAddress(gpu_addr);
  1533. TextureBufferBinding binding;
  1534. if (!cpu_addr || size == 0) {
  1535. binding.cpu_addr = 0;
  1536. binding.size = 0;
  1537. binding.buffer_id = NULL_BUFFER_ID;
  1538. binding.format = PixelFormat::Invalid;
  1539. } else {
  1540. binding.cpu_addr = *cpu_addr;
  1541. binding.size = size;
  1542. binding.buffer_id = BufferId{};
  1543. binding.format = format;
  1544. }
  1545. return binding;
  1546. }
  1547. template <class P>
  1548. std::span<const u8> BufferCache<P>::ImmediateBufferWithData(VAddr cpu_addr, size_t size) {
  1549. u8* const base_pointer = cpu_memory.GetPointer(cpu_addr);
  1550. if (IsRangeGranular(cpu_addr, size) ||
  1551. base_pointer + size == cpu_memory.GetPointer(cpu_addr + size)) {
  1552. return std::span(base_pointer, size);
  1553. } else {
  1554. const std::span<u8> span = ImmediateBuffer(size);
  1555. cpu_memory.ReadBlockUnsafe(cpu_addr, span.data(), size);
  1556. return span;
  1557. }
  1558. }
  1559. template <class P>
  1560. std::span<u8> BufferCache<P>::ImmediateBuffer(size_t wanted_capacity) {
  1561. if (wanted_capacity > immediate_buffer_capacity) {
  1562. immediate_buffer_capacity = wanted_capacity;
  1563. immediate_buffer_alloc = std::make_unique<u8[]>(wanted_capacity);
  1564. }
  1565. return std::span<u8>(immediate_buffer_alloc.get(), wanted_capacity);
  1566. }
  1567. template <class P>
  1568. bool BufferCache<P>::HasFastUniformBufferBound(size_t stage, u32 binding_index) const noexcept {
  1569. if constexpr (IS_OPENGL) {
  1570. return ((fast_bound_uniform_buffers[stage] >> binding_index) & 1) != 0;
  1571. } else {
  1572. // Only OpenGL has fast uniform buffers
  1573. return false;
  1574. }
  1575. }
  1576. } // namespace VideoCommon