dma_pusher.cpp 4.2 KB

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  1. // Copyright 2018 yuzu Emulator Project
  2. // Licensed under GPLv2 or any later version
  3. // Refer to the license.txt file included.
  4. #include "common/microprofile.h"
  5. #include "core/core.h"
  6. #include "core/memory.h"
  7. #include "video_core/dma_pusher.h"
  8. #include "video_core/engines/maxwell_3d.h"
  9. #include "video_core/gpu.h"
  10. namespace Tegra {
  11. DmaPusher::DmaPusher(GPU& gpu) : gpu(gpu) {}
  12. DmaPusher::~DmaPusher() = default;
  13. MICROPROFILE_DEFINE(DispatchCalls, "GPU", "Execute command buffer", MP_RGB(128, 128, 192));
  14. void DmaPusher::DispatchCalls() {
  15. MICROPROFILE_SCOPE(DispatchCalls);
  16. // On entering GPU code, assume all memory may be touched by the ARM core.
  17. gpu.Maxwell3D().dirty_flags.OnMemoryWrite();
  18. dma_pushbuffer_subindex = 0;
  19. while (Core::System::GetInstance().IsPoweredOn()) {
  20. if (!Step()) {
  21. break;
  22. }
  23. }
  24. }
  25. bool DmaPusher::Step() {
  26. if (!ib_enable || dma_pushbuffer.empty()) {
  27. // pushbuffer empty and IB empty or nonexistent - nothing to do
  28. return false;
  29. }
  30. const CommandList& command_list{dma_pushbuffer.front()};
  31. const CommandListHeader command_list_header{command_list[dma_pushbuffer_subindex++]};
  32. GPUVAddr dma_get = command_list_header.addr;
  33. GPUVAddr dma_put = dma_get + command_list_header.size * sizeof(u32);
  34. bool non_main = command_list_header.is_non_main;
  35. if (dma_pushbuffer_subindex >= command_list.size()) {
  36. // We've gone through the current list, remove it from the queue
  37. dma_pushbuffer.pop();
  38. dma_pushbuffer_subindex = 0;
  39. }
  40. if (command_list_header.size == 0) {
  41. return true;
  42. }
  43. // Push buffer non-empty, read a word
  44. const auto address = gpu.MemoryManager().GpuToCpuAddress(dma_get);
  45. ASSERT_MSG(address, "Invalid GPU address");
  46. command_headers.resize(command_list_header.size);
  47. Memory::ReadBlock(*address, command_headers.data(), command_list_header.size * sizeof(u32));
  48. for (const CommandHeader& command_header : command_headers) {
  49. // now, see if we're in the middle of a command
  50. if (dma_state.length_pending) {
  51. // Second word of long non-inc methods command - method count
  52. dma_state.length_pending = 0;
  53. dma_state.method_count = command_header.method_count_;
  54. } else if (dma_state.method_count) {
  55. // Data word of methods command
  56. CallMethod(command_header.argument);
  57. if (!dma_state.non_incrementing) {
  58. dma_state.method++;
  59. }
  60. if (dma_increment_once) {
  61. dma_state.non_incrementing = true;
  62. }
  63. dma_state.method_count--;
  64. } else {
  65. // No command active - this is the first word of a new one
  66. switch (command_header.mode) {
  67. case SubmissionMode::Increasing:
  68. SetState(command_header);
  69. dma_state.non_incrementing = false;
  70. dma_increment_once = false;
  71. break;
  72. case SubmissionMode::NonIncreasing:
  73. SetState(command_header);
  74. dma_state.non_incrementing = true;
  75. dma_increment_once = false;
  76. break;
  77. case SubmissionMode::Inline:
  78. dma_state.method = command_header.method;
  79. dma_state.subchannel = command_header.subchannel;
  80. CallMethod(command_header.arg_count);
  81. dma_state.non_incrementing = true;
  82. dma_increment_once = false;
  83. break;
  84. case SubmissionMode::IncreaseOnce:
  85. SetState(command_header);
  86. dma_state.non_incrementing = false;
  87. dma_increment_once = true;
  88. break;
  89. }
  90. }
  91. }
  92. if (!non_main) {
  93. // TODO (degasus): This is dead code, as dma_mget is never read.
  94. dma_mget = dma_put;
  95. }
  96. return true;
  97. }
  98. void DmaPusher::SetState(const CommandHeader& command_header) {
  99. dma_state.method = command_header.method;
  100. dma_state.subchannel = command_header.subchannel;
  101. dma_state.method_count = command_header.method_count;
  102. }
  103. void DmaPusher::CallMethod(u32 argument) const {
  104. gpu.CallMethod({dma_state.method, argument, dma_state.subchannel, dma_state.method_count});
  105. }
  106. } // namespace Tegra