arminit.cpp 5.2 KB

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  1. /* arminit.c -- ARMulator initialization: ARM6 Instruction Emulator.
  2. Copyright (C) 1994 Advanced RISC Machines Ltd.
  3. This program is free software; you can redistribute it and/or modify
  4. it under the terms of the GNU General Public License as published by
  5. the Free Software Foundation; either version 2 of the License, or
  6. (at your option) any later version.
  7. This program is distributed in the hope that it will be useful,
  8. but WITHOUT ANY WARRANTY; without even the implied warranty of
  9. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  10. GNU General Public License for more details.
  11. You should have received a copy of the GNU General Public License
  12. along with this program; if not, write to the Free Software
  13. Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
  14. #include "core/arm/skyeye_common/armdefs.h"
  15. #include "core/arm/skyeye_common/armemu.h"
  16. /***************************************************************************\
  17. * Definitions for the emulator architecture *
  18. \***************************************************************************/
  19. void ARMul_EmulateInit();
  20. ARMul_State* ARMul_NewState(ARMul_State* state);
  21. void ARMul_Reset (ARMul_State* state);
  22. unsigned ARMul_MultTable[32] = {
  23. 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9,
  24. 10, 10, 11, 11, 12, 12, 13, 13, 14, 14, 15, 15, 16, 16, 16
  25. };
  26. ARMword ARMul_ImmedTable[4096]; // immediate DP LHS values
  27. char ARMul_BitList[256]; // number of bits in a byte table
  28. /***************************************************************************\
  29. * Call this routine once to set up the emulator's tables. *
  30. \***************************************************************************/
  31. void ARMul_EmulateInit()
  32. {
  33. unsigned int i, j;
  34. // the values of 12 bit dp rhs's
  35. for (i = 0; i < 4096; i++) {
  36. ARMul_ImmedTable[i] = ROTATER (i & 0xffL, (i >> 7L) & 0x1eL);
  37. }
  38. // how many bits in LSM
  39. for (i = 0; i < 256; ARMul_BitList[i++] = 0);
  40. for (j = 1; j < 256; j <<= 1)
  41. for (i = 0; i < 256; i++)
  42. if ((i & j) > 0)
  43. ARMul_BitList[i]++;
  44. // you always need 4 times these values
  45. for (i = 0; i < 256; i++)
  46. ARMul_BitList[i] *= 4;
  47. }
  48. /***************************************************************************\
  49. * Returns a new instantiation of the ARMulator's state *
  50. \***************************************************************************/
  51. ARMul_State* ARMul_NewState(ARMul_State* state)
  52. {
  53. memset (state, 0, sizeof (ARMul_State));
  54. state->Emulate = RUN;
  55. for (unsigned int i = 0; i < 16; i++) {
  56. state->Reg[i] = 0;
  57. for (unsigned int j = 0; j < 7; j++)
  58. state->RegBank[j][i] = 0;
  59. }
  60. for (unsigned int i = 0; i < 7; i++)
  61. state->Spsr[i] = 0;
  62. state->Mode = USER32MODE;
  63. state->VectorCatch = 0;
  64. state->Aborted = false;
  65. state->Reseted = false;
  66. state->Inted = 3;
  67. state->LastInted = 3;
  68. #ifdef ARM61
  69. state->prog32Sig = LOW;
  70. state->data32Sig = LOW;
  71. #else
  72. state->prog32Sig = HIGH;
  73. state->data32Sig = HIGH;
  74. #endif
  75. state->lateabtSig = HIGH;
  76. state->bigendSig = LOW;
  77. return state;
  78. }
  79. /***************************************************************************\
  80. * Call this routine to set ARMulator to model a certain processor *
  81. \***************************************************************************/
  82. void ARMul_SelectProcessor(ARMul_State* state, unsigned properties)
  83. {
  84. if (properties & ARM_Fix26_Prop) {
  85. state->prog32Sig = LOW;
  86. state->data32Sig = LOW;
  87. } else {
  88. state->prog32Sig = HIGH;
  89. state->data32Sig = HIGH;
  90. }
  91. state->is_v4 = (properties & (ARM_v4_Prop | ARM_v5_Prop)) != 0;
  92. state->is_v5 = (properties & ARM_v5_Prop) != 0;
  93. state->is_v5e = (properties & ARM_v5e_Prop) != 0;
  94. state->is_XScale = (properties & ARM_XScale_Prop) != 0;
  95. state->is_iWMMXt = (properties & ARM_iWMMXt_Prop) != 0;
  96. state->is_v6 = (properties & ARM_v6_Prop) != 0;
  97. state->is_ep9312 = (properties & ARM_ep9312_Prop) != 0;
  98. state->is_pxa27x = (properties & ARM_PXA27X_Prop) != 0;
  99. state->is_v7 = (properties & ARM_v7_Prop) != 0;
  100. /* Only initialse the coprocessor support once we
  101. know what kind of chip we are dealing with. */
  102. //ARMul_CoProInit (state);
  103. }
  104. /***************************************************************************\
  105. * Call this routine to set up the initial machine state (or perform a RESET *
  106. \***************************************************************************/
  107. void ARMul_Reset(ARMul_State* state)
  108. {
  109. state->NextInstr = 0;
  110. if (state->prog32Sig) {
  111. state->Reg[15] = 0;
  112. state->Cpsr = INTBITS | SVC32MODE;
  113. state->Mode = SVC32MODE;
  114. } else {
  115. state->Reg[15] = R15INTBITS | SVC26MODE;
  116. state->Cpsr = INTBITS | SVC26MODE;
  117. state->Mode = SVC26MODE;
  118. }
  119. state->Bank = SVCBANK;
  120. FLUSHPIPE;
  121. state->EndCondition = 0;
  122. state->ErrorCode = 0;
  123. state->NresetSig = HIGH;
  124. state->NfiqSig = HIGH;
  125. state->NirqSig = HIGH;
  126. state->NtransSig = (state->Mode & 3) ? HIGH : LOW;
  127. state->abortSig = LOW;
  128. state->AbortAddr = 1;
  129. state->NumInstrs = 0;
  130. }