shader_interpreter.cpp 27 KB

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  1. // Copyright 2014 Citra Emulator Project
  2. // Licensed under GPLv2 or any later version
  3. // Refer to the license.txt file included.
  4. #include <common/file_util.h>
  5. #include <nihstro/shader_bytecode.h>
  6. #include "video_core/pica.h"
  7. #include "video_core/pica_state.h"
  8. #include "video_core/shader/shader.h"
  9. #include "video_core/shader/shader_interpreter.h"
  10. using nihstro::OpCode;
  11. using nihstro::Instruction;
  12. using nihstro::RegisterType;
  13. using nihstro::SourceRegister;
  14. using nihstro::SwizzlePattern;
  15. namespace Pica {
  16. namespace Shader {
  17. template<bool Debug>
  18. void RunInterpreter(UnitState<Debug>& state) {
  19. const auto& uniforms = g_state.vs.uniforms;
  20. const auto& swizzle_data = g_state.vs.swizzle_data;
  21. const auto& program_code = g_state.vs.program_code;
  22. // Placeholder for invalid inputs
  23. static float24 dummy_vec4_float24[4];
  24. unsigned iteration = 0;
  25. bool exit_loop = false;
  26. while (!exit_loop) {
  27. if (!state.call_stack.empty()) {
  28. auto& top = state.call_stack.back();
  29. if (state.program_counter == top.final_address) {
  30. state.address_registers[2] += top.loop_increment;
  31. if (top.repeat_counter-- == 0) {
  32. state.program_counter = top.return_address;
  33. state.call_stack.pop_back();
  34. } else {
  35. state.program_counter = top.loop_address;
  36. }
  37. // TODO: Is "trying again" accurate to hardware?
  38. continue;
  39. }
  40. }
  41. const Instruction instr = { program_code[state.program_counter] };
  42. const SwizzlePattern swizzle = { swizzle_data[instr.common.operand_desc_id] };
  43. static auto call = [](UnitState<Debug>& state, u32 offset, u32 num_instructions,
  44. u32 return_offset, u8 repeat_count, u8 loop_increment) {
  45. state.program_counter = offset - 1; // -1 to make sure when incrementing the PC we end up at the correct offset
  46. ASSERT(state.call_stack.size() < state.call_stack.capacity());
  47. state.call_stack.push_back({ offset + num_instructions, return_offset, repeat_count, loop_increment, offset });
  48. };
  49. Record<DebugDataRecord::CUR_INSTR>(state.debug, iteration, state.program_counter);
  50. if (iteration > 0)
  51. Record<DebugDataRecord::NEXT_INSTR>(state.debug, iteration - 1, state.program_counter);
  52. state.debug.max_offset = std::max<u32>(state.debug.max_offset, 1 + state.program_counter);
  53. auto LookupSourceRegister = [&](const SourceRegister& source_reg) -> const float24* {
  54. switch (source_reg.GetRegisterType()) {
  55. case RegisterType::Input:
  56. return &state.registers.input[source_reg.GetIndex()].x;
  57. case RegisterType::Temporary:
  58. return &state.registers.temporary[source_reg.GetIndex()].x;
  59. case RegisterType::FloatUniform:
  60. return &uniforms.f[source_reg.GetIndex()].x;
  61. default:
  62. return dummy_vec4_float24;
  63. }
  64. };
  65. switch (instr.opcode.Value().GetInfo().type) {
  66. case OpCode::Type::Arithmetic:
  67. {
  68. const bool is_inverted = (0 != (instr.opcode.Value().GetInfo().subtype & OpCode::Info::SrcInversed));
  69. const int address_offset = (instr.common.address_register_index == 0)
  70. ? 0 : state.address_registers[instr.common.address_register_index - 1];
  71. const float24* src1_ = LookupSourceRegister(instr.common.GetSrc1(is_inverted) + (!is_inverted * address_offset));
  72. const float24* src2_ = LookupSourceRegister(instr.common.GetSrc2(is_inverted) + ( is_inverted * address_offset));
  73. const bool negate_src1 = ((bool)swizzle.negate_src1 != false);
  74. const bool negate_src2 = ((bool)swizzle.negate_src2 != false);
  75. float24 src1[4] = {
  76. src1_[(int)swizzle.GetSelectorSrc1(0)],
  77. src1_[(int)swizzle.GetSelectorSrc1(1)],
  78. src1_[(int)swizzle.GetSelectorSrc1(2)],
  79. src1_[(int)swizzle.GetSelectorSrc1(3)],
  80. };
  81. if (negate_src1) {
  82. src1[0] = src1[0] * float24::FromFloat32(-1);
  83. src1[1] = src1[1] * float24::FromFloat32(-1);
  84. src1[2] = src1[2] * float24::FromFloat32(-1);
  85. src1[3] = src1[3] * float24::FromFloat32(-1);
  86. }
  87. float24 src2[4] = {
  88. src2_[(int)swizzle.GetSelectorSrc2(0)],
  89. src2_[(int)swizzle.GetSelectorSrc2(1)],
  90. src2_[(int)swizzle.GetSelectorSrc2(2)],
  91. src2_[(int)swizzle.GetSelectorSrc2(3)],
  92. };
  93. if (negate_src2) {
  94. src2[0] = src2[0] * float24::FromFloat32(-1);
  95. src2[1] = src2[1] * float24::FromFloat32(-1);
  96. src2[2] = src2[2] * float24::FromFloat32(-1);
  97. src2[3] = src2[3] * float24::FromFloat32(-1);
  98. }
  99. float24* dest = (instr.common.dest.Value() < 0x10) ? &state.registers.output[instr.common.dest.Value().GetIndex()][0]
  100. : (instr.common.dest.Value() < 0x20) ? &state.registers.temporary[instr.common.dest.Value().GetIndex()][0]
  101. : dummy_vec4_float24;
  102. state.debug.max_opdesc_id = std::max<u32>(state.debug.max_opdesc_id, 1+instr.common.operand_desc_id);
  103. switch (instr.opcode.Value().EffectiveOpCode()) {
  104. case OpCode::Id::ADD:
  105. {
  106. Record<DebugDataRecord::SRC1>(state.debug, iteration, src1);
  107. Record<DebugDataRecord::SRC2>(state.debug, iteration, src2);
  108. Record<DebugDataRecord::DEST_IN>(state.debug, iteration, dest);
  109. for (int i = 0; i < 4; ++i) {
  110. if (!swizzle.DestComponentEnabled(i))
  111. continue;
  112. dest[i] = src1[i] + src2[i];
  113. }
  114. Record<DebugDataRecord::DEST_OUT>(state.debug, iteration, dest);
  115. break;
  116. }
  117. case OpCode::Id::MUL:
  118. {
  119. Record<DebugDataRecord::SRC1>(state.debug, iteration, src1);
  120. Record<DebugDataRecord::SRC2>(state.debug, iteration, src2);
  121. Record<DebugDataRecord::DEST_IN>(state.debug, iteration, dest);
  122. for (int i = 0; i < 4; ++i) {
  123. if (!swizzle.DestComponentEnabled(i))
  124. continue;
  125. dest[i] = src1[i] * src2[i];
  126. }
  127. Record<DebugDataRecord::DEST_OUT>(state.debug, iteration, dest);
  128. break;
  129. }
  130. case OpCode::Id::FLR:
  131. Record<DebugDataRecord::SRC1>(state.debug, iteration, src1);
  132. Record<DebugDataRecord::DEST_IN>(state.debug, iteration, dest);
  133. for (int i = 0; i < 4; ++i) {
  134. if (!swizzle.DestComponentEnabled(i))
  135. continue;
  136. dest[i] = float24::FromFloat32(std::floor(src1[i].ToFloat32()));
  137. }
  138. Record<DebugDataRecord::DEST_OUT>(state.debug, iteration, dest);
  139. break;
  140. case OpCode::Id::MAX:
  141. Record<DebugDataRecord::SRC1>(state.debug, iteration, src1);
  142. Record<DebugDataRecord::SRC2>(state.debug, iteration, src2);
  143. Record<DebugDataRecord::DEST_IN>(state.debug, iteration, dest);
  144. for (int i = 0; i < 4; ++i) {
  145. if (!swizzle.DestComponentEnabled(i))
  146. continue;
  147. // NOTE: Exact form required to match NaN semantics to hardware:
  148. // max(0, NaN) -> NaN
  149. // max(NaN, 0) -> 0
  150. dest[i] = (src1[i] > src2[i]) ? src1[i] : src2[i];
  151. }
  152. Record<DebugDataRecord::DEST_OUT>(state.debug, iteration, dest);
  153. break;
  154. case OpCode::Id::MIN:
  155. Record<DebugDataRecord::SRC1>(state.debug, iteration, src1);
  156. Record<DebugDataRecord::SRC2>(state.debug, iteration, src2);
  157. Record<DebugDataRecord::DEST_IN>(state.debug, iteration, dest);
  158. for (int i = 0; i < 4; ++i) {
  159. if (!swizzle.DestComponentEnabled(i))
  160. continue;
  161. // NOTE: Exact form required to match NaN semantics to hardware:
  162. // min(0, NaN) -> NaN
  163. // min(NaN, 0) -> 0
  164. dest[i] = (src1[i] < src2[i]) ? src1[i] : src2[i];
  165. }
  166. Record<DebugDataRecord::DEST_OUT>(state.debug, iteration, dest);
  167. break;
  168. case OpCode::Id::DP3:
  169. case OpCode::Id::DP4:
  170. case OpCode::Id::DPH:
  171. case OpCode::Id::DPHI:
  172. {
  173. Record<DebugDataRecord::SRC1>(state.debug, iteration, src1);
  174. Record<DebugDataRecord::SRC2>(state.debug, iteration, src2);
  175. Record<DebugDataRecord::DEST_IN>(state.debug, iteration, dest);
  176. OpCode::Id opcode = instr.opcode.Value().EffectiveOpCode();
  177. if (opcode == OpCode::Id::DPH || opcode == OpCode::Id::DPHI)
  178. src1[3] = float24::FromFloat32(1.0f);
  179. float24 dot = float24::FromFloat32(0.f);
  180. int num_components = (opcode == OpCode::Id::DP3) ? 3 : 4;
  181. for (int i = 0; i < num_components; ++i)
  182. dot = dot + src1[i] * src2[i];
  183. for (int i = 0; i < 4; ++i) {
  184. if (!swizzle.DestComponentEnabled(i))
  185. continue;
  186. dest[i] = dot;
  187. }
  188. Record<DebugDataRecord::DEST_OUT>(state.debug, iteration, dest);
  189. break;
  190. }
  191. // Reciprocal
  192. case OpCode::Id::RCP:
  193. {
  194. Record<DebugDataRecord::SRC1>(state.debug, iteration, src1);
  195. Record<DebugDataRecord::DEST_IN>(state.debug, iteration, dest);
  196. float24 rcp_res = float24::FromFloat32(1.0f / src1[0].ToFloat32());
  197. for (int i = 0; i < 4; ++i) {
  198. if (!swizzle.DestComponentEnabled(i))
  199. continue;
  200. dest[i] = rcp_res;
  201. }
  202. Record<DebugDataRecord::DEST_OUT>(state.debug, iteration, dest);
  203. break;
  204. }
  205. // Reciprocal Square Root
  206. case OpCode::Id::RSQ:
  207. {
  208. Record<DebugDataRecord::SRC1>(state.debug, iteration, src1);
  209. Record<DebugDataRecord::DEST_IN>(state.debug, iteration, dest);
  210. float24 rsq_res = float24::FromFloat32(1.0f / std::sqrt(src1[0].ToFloat32()));
  211. for (int i = 0; i < 4; ++i) {
  212. if (!swizzle.DestComponentEnabled(i))
  213. continue;
  214. dest[i] = rsq_res;
  215. }
  216. Record<DebugDataRecord::DEST_OUT>(state.debug, iteration, dest);
  217. break;
  218. }
  219. case OpCode::Id::MOVA:
  220. {
  221. Record<DebugDataRecord::SRC1>(state.debug, iteration, src1);
  222. for (int i = 0; i < 2; ++i) {
  223. if (!swizzle.DestComponentEnabled(i))
  224. continue;
  225. // TODO: Figure out how the rounding is done on hardware
  226. state.address_registers[i] = static_cast<s32>(src1[i].ToFloat32());
  227. }
  228. Record<DebugDataRecord::ADDR_REG_OUT>(state.debug, iteration, state.address_registers);
  229. break;
  230. }
  231. case OpCode::Id::MOV:
  232. {
  233. Record<DebugDataRecord::SRC1>(state.debug, iteration, src1);
  234. Record<DebugDataRecord::DEST_IN>(state.debug, iteration, dest);
  235. for (int i = 0; i < 4; ++i) {
  236. if (!swizzle.DestComponentEnabled(i))
  237. continue;
  238. dest[i] = src1[i];
  239. }
  240. Record<DebugDataRecord::DEST_OUT>(state.debug, iteration, dest);
  241. break;
  242. }
  243. case OpCode::Id::SGE:
  244. case OpCode::Id::SGEI:
  245. Record<DebugDataRecord::SRC1>(state.debug, iteration, src1);
  246. Record<DebugDataRecord::SRC2>(state.debug, iteration, src2);
  247. Record<DebugDataRecord::DEST_IN>(state.debug, iteration, dest);
  248. for (int i = 0; i < 4; ++i) {
  249. if (!swizzle.DestComponentEnabled(i))
  250. continue;
  251. dest[i] = (src1[i] >= src2[i]) ? float24::FromFloat32(1.0f) : float24::FromFloat32(0.0f);
  252. }
  253. Record<DebugDataRecord::DEST_OUT>(state.debug, iteration, dest);
  254. break;
  255. case OpCode::Id::SLT:
  256. case OpCode::Id::SLTI:
  257. Record<DebugDataRecord::SRC1>(state.debug, iteration, src1);
  258. Record<DebugDataRecord::SRC2>(state.debug, iteration, src2);
  259. Record<DebugDataRecord::DEST_IN>(state.debug, iteration, dest);
  260. for (int i = 0; i < 4; ++i) {
  261. if (!swizzle.DestComponentEnabled(i))
  262. continue;
  263. dest[i] = (src1[i] < src2[i]) ? float24::FromFloat32(1.0f) : float24::FromFloat32(0.0f);
  264. }
  265. Record<DebugDataRecord::DEST_OUT>(state.debug, iteration, dest);
  266. break;
  267. case OpCode::Id::CMP:
  268. Record<DebugDataRecord::SRC1>(state.debug, iteration, src1);
  269. Record<DebugDataRecord::SRC2>(state.debug, iteration, src2);
  270. for (int i = 0; i < 2; ++i) {
  271. // TODO: Can you restrict to one compare via dest masking?
  272. auto compare_op = instr.common.compare_op;
  273. auto op = (i == 0) ? compare_op.x.Value() : compare_op.y.Value();
  274. switch (op) {
  275. case Instruction::Common::CompareOpType::Equal:
  276. state.conditional_code[i] = (src1[i] == src2[i]);
  277. break;
  278. case Instruction::Common::CompareOpType::NotEqual:
  279. state.conditional_code[i] = (src1[i] != src2[i]);
  280. break;
  281. case Instruction::Common::CompareOpType::LessThan:
  282. state.conditional_code[i] = (src1[i] < src2[i]);
  283. break;
  284. case Instruction::Common::CompareOpType::LessEqual:
  285. state.conditional_code[i] = (src1[i] <= src2[i]);
  286. break;
  287. case Instruction::Common::CompareOpType::GreaterThan:
  288. state.conditional_code[i] = (src1[i] > src2[i]);
  289. break;
  290. case Instruction::Common::CompareOpType::GreaterEqual:
  291. state.conditional_code[i] = (src1[i] >= src2[i]);
  292. break;
  293. default:
  294. LOG_ERROR(HW_GPU, "Unknown compare mode %x", static_cast<int>(op));
  295. break;
  296. }
  297. }
  298. Record<DebugDataRecord::CMP_RESULT>(state.debug, iteration, state.conditional_code);
  299. break;
  300. case OpCode::Id::EX2:
  301. {
  302. Record<DebugDataRecord::SRC1>(state.debug, iteration, src1);
  303. Record<DebugDataRecord::DEST_IN>(state.debug, iteration, dest);
  304. // EX2 only takes first component exp2 and writes it to all dest components
  305. float24 ex2_res = float24::FromFloat32(std::exp2(src1[0].ToFloat32()));
  306. for (int i = 0; i < 4; ++i) {
  307. if (!swizzle.DestComponentEnabled(i))
  308. continue;
  309. dest[i] = ex2_res;
  310. }
  311. Record<DebugDataRecord::DEST_OUT>(state.debug, iteration, dest);
  312. break;
  313. }
  314. case OpCode::Id::LG2:
  315. {
  316. Record<DebugDataRecord::SRC1>(state.debug, iteration, src1);
  317. Record<DebugDataRecord::DEST_IN>(state.debug, iteration, dest);
  318. // LG2 only takes the first component log2 and writes it to all dest components
  319. float24 lg2_res = float24::FromFloat32(std::log2(src1[0].ToFloat32()));
  320. for (int i = 0; i < 4; ++i) {
  321. if (!swizzle.DestComponentEnabled(i))
  322. continue;
  323. dest[i] = lg2_res;
  324. }
  325. Record<DebugDataRecord::DEST_OUT>(state.debug, iteration, dest);
  326. break;
  327. }
  328. default:
  329. LOG_ERROR(HW_GPU, "Unhandled arithmetic instruction: 0x%02x (%s): 0x%08x",
  330. (int)instr.opcode.Value().EffectiveOpCode(), instr.opcode.Value().GetInfo().name, instr.hex);
  331. DEBUG_ASSERT(false);
  332. break;
  333. }
  334. break;
  335. }
  336. case OpCode::Type::MultiplyAdd:
  337. {
  338. if ((instr.opcode.Value().EffectiveOpCode() == OpCode::Id::MAD) ||
  339. (instr.opcode.Value().EffectiveOpCode() == OpCode::Id::MADI)) {
  340. const SwizzlePattern& swizzle = *(SwizzlePattern*)&swizzle_data[instr.mad.operand_desc_id];
  341. bool is_inverted = (instr.opcode.Value().EffectiveOpCode() == OpCode::Id::MADI);
  342. const float24* src1_ = LookupSourceRegister(instr.mad.GetSrc1(is_inverted));
  343. const float24* src2_ = LookupSourceRegister(instr.mad.GetSrc2(is_inverted));
  344. const float24* src3_ = LookupSourceRegister(instr.mad.GetSrc3(is_inverted));
  345. const bool negate_src1 = ((bool)swizzle.negate_src1 != false);
  346. const bool negate_src2 = ((bool)swizzle.negate_src2 != false);
  347. const bool negate_src3 = ((bool)swizzle.negate_src3 != false);
  348. float24 src1[4] = {
  349. src1_[(int)swizzle.GetSelectorSrc1(0)],
  350. src1_[(int)swizzle.GetSelectorSrc1(1)],
  351. src1_[(int)swizzle.GetSelectorSrc1(2)],
  352. src1_[(int)swizzle.GetSelectorSrc1(3)],
  353. };
  354. if (negate_src1) {
  355. src1[0] = src1[0] * float24::FromFloat32(-1);
  356. src1[1] = src1[1] * float24::FromFloat32(-1);
  357. src1[2] = src1[2] * float24::FromFloat32(-1);
  358. src1[3] = src1[3] * float24::FromFloat32(-1);
  359. }
  360. float24 src2[4] = {
  361. src2_[(int)swizzle.GetSelectorSrc2(0)],
  362. src2_[(int)swizzle.GetSelectorSrc2(1)],
  363. src2_[(int)swizzle.GetSelectorSrc2(2)],
  364. src2_[(int)swizzle.GetSelectorSrc2(3)],
  365. };
  366. if (negate_src2) {
  367. src2[0] = src2[0] * float24::FromFloat32(-1);
  368. src2[1] = src2[1] * float24::FromFloat32(-1);
  369. src2[2] = src2[2] * float24::FromFloat32(-1);
  370. src2[3] = src2[3] * float24::FromFloat32(-1);
  371. }
  372. float24 src3[4] = {
  373. src3_[(int)swizzle.GetSelectorSrc3(0)],
  374. src3_[(int)swizzle.GetSelectorSrc3(1)],
  375. src3_[(int)swizzle.GetSelectorSrc3(2)],
  376. src3_[(int)swizzle.GetSelectorSrc3(3)],
  377. };
  378. if (negate_src3) {
  379. src3[0] = src3[0] * float24::FromFloat32(-1);
  380. src3[1] = src3[1] * float24::FromFloat32(-1);
  381. src3[2] = src3[2] * float24::FromFloat32(-1);
  382. src3[3] = src3[3] * float24::FromFloat32(-1);
  383. }
  384. float24* dest = (instr.mad.dest.Value() < 0x10) ? &state.registers.output[instr.mad.dest.Value().GetIndex()][0]
  385. : (instr.mad.dest.Value() < 0x20) ? &state.registers.temporary[instr.mad.dest.Value().GetIndex()][0]
  386. : dummy_vec4_float24;
  387. Record<DebugDataRecord::SRC1>(state.debug, iteration, src1);
  388. Record<DebugDataRecord::SRC2>(state.debug, iteration, src2);
  389. Record<DebugDataRecord::SRC3>(state.debug, iteration, src3);
  390. Record<DebugDataRecord::DEST_IN>(state.debug, iteration, dest);
  391. for (int i = 0; i < 4; ++i) {
  392. if (!swizzle.DestComponentEnabled(i))
  393. continue;
  394. dest[i] = src1[i] * src2[i] + src3[i];
  395. }
  396. Record<DebugDataRecord::DEST_OUT>(state.debug, iteration, dest);
  397. } else {
  398. LOG_ERROR(HW_GPU, "Unhandled multiply-add instruction: 0x%02x (%s): 0x%08x",
  399. (int)instr.opcode.Value().EffectiveOpCode(), instr.opcode.Value().GetInfo().name, instr.hex);
  400. }
  401. break;
  402. }
  403. default:
  404. {
  405. static auto evaluate_condition = [](const UnitState<Debug>& state, bool refx, bool refy, Instruction::FlowControlType flow_control) {
  406. bool results[2] = { refx == state.conditional_code[0],
  407. refy == state.conditional_code[1] };
  408. switch (flow_control.op) {
  409. case flow_control.Or:
  410. return results[0] || results[1];
  411. case flow_control.And:
  412. return results[0] && results[1];
  413. case flow_control.JustX:
  414. return results[0];
  415. case flow_control.JustY:
  416. return results[1];
  417. }
  418. };
  419. // Handle each instruction on its own
  420. switch (instr.opcode.Value()) {
  421. case OpCode::Id::END:
  422. exit_loop = true;
  423. break;
  424. case OpCode::Id::JMPC:
  425. Record<DebugDataRecord::COND_CMP_IN>(state.debug, iteration, state.conditional_code);
  426. if (evaluate_condition(state, instr.flow_control.refx, instr.flow_control.refy, instr.flow_control)) {
  427. state.program_counter = instr.flow_control.dest_offset - 1;
  428. }
  429. break;
  430. case OpCode::Id::JMPU:
  431. Record<DebugDataRecord::COND_BOOL_IN>(state.debug, iteration, uniforms.b[instr.flow_control.bool_uniform_id]);
  432. if (uniforms.b[instr.flow_control.bool_uniform_id] == !(instr.flow_control.num_instructions & 1)) {
  433. state.program_counter = instr.flow_control.dest_offset - 1;
  434. }
  435. break;
  436. case OpCode::Id::CALL:
  437. call(state,
  438. instr.flow_control.dest_offset,
  439. instr.flow_control.num_instructions,
  440. state.program_counter + 1, 0, 0);
  441. break;
  442. case OpCode::Id::CALLU:
  443. Record<DebugDataRecord::COND_BOOL_IN>(state.debug, iteration, uniforms.b[instr.flow_control.bool_uniform_id]);
  444. if (uniforms.b[instr.flow_control.bool_uniform_id]) {
  445. call(state,
  446. instr.flow_control.dest_offset,
  447. instr.flow_control.num_instructions,
  448. state.program_counter + 1, 0, 0);
  449. }
  450. break;
  451. case OpCode::Id::CALLC:
  452. Record<DebugDataRecord::COND_CMP_IN>(state.debug, iteration, state.conditional_code);
  453. if (evaluate_condition(state, instr.flow_control.refx, instr.flow_control.refy, instr.flow_control)) {
  454. call(state,
  455. instr.flow_control.dest_offset,
  456. instr.flow_control.num_instructions,
  457. state.program_counter + 1, 0, 0);
  458. }
  459. break;
  460. case OpCode::Id::NOP:
  461. break;
  462. case OpCode::Id::IFU:
  463. Record<DebugDataRecord::COND_BOOL_IN>(state.debug, iteration, uniforms.b[instr.flow_control.bool_uniform_id]);
  464. if (uniforms.b[instr.flow_control.bool_uniform_id]) {
  465. call(state,
  466. state.program_counter + 1,
  467. instr.flow_control.dest_offset - state.program_counter - 1,
  468. instr.flow_control.dest_offset + instr.flow_control.num_instructions, 0, 0);
  469. } else {
  470. call(state,
  471. instr.flow_control.dest_offset,
  472. instr.flow_control.num_instructions,
  473. instr.flow_control.dest_offset + instr.flow_control.num_instructions, 0, 0);
  474. }
  475. break;
  476. case OpCode::Id::IFC:
  477. {
  478. // TODO: Do we need to consider swizzlers here?
  479. Record<DebugDataRecord::COND_CMP_IN>(state.debug, iteration, state.conditional_code);
  480. if (evaluate_condition(state, instr.flow_control.refx, instr.flow_control.refy, instr.flow_control)) {
  481. call(state,
  482. state.program_counter + 1,
  483. instr.flow_control.dest_offset - state.program_counter - 1,
  484. instr.flow_control.dest_offset + instr.flow_control.num_instructions, 0, 0);
  485. } else {
  486. call(state,
  487. instr.flow_control.dest_offset,
  488. instr.flow_control.num_instructions,
  489. instr.flow_control.dest_offset + instr.flow_control.num_instructions, 0, 0);
  490. }
  491. break;
  492. }
  493. case OpCode::Id::LOOP:
  494. {
  495. Math::Vec4<u8> loop_param(uniforms.i[instr.flow_control.int_uniform_id].x,
  496. uniforms.i[instr.flow_control.int_uniform_id].y,
  497. uniforms.i[instr.flow_control.int_uniform_id].z,
  498. uniforms.i[instr.flow_control.int_uniform_id].w);
  499. state.address_registers[2] = loop_param.y;
  500. Record<DebugDataRecord::LOOP_INT_IN>(state.debug, iteration, loop_param);
  501. call(state,
  502. state.program_counter + 1,
  503. instr.flow_control.dest_offset - state.program_counter + 1,
  504. instr.flow_control.dest_offset + 1,
  505. loop_param.x,
  506. loop_param.z);
  507. break;
  508. }
  509. default:
  510. LOG_ERROR(HW_GPU, "Unhandled instruction: 0x%02x (%s): 0x%08x",
  511. (int)instr.opcode.Value().EffectiveOpCode(), instr.opcode.Value().GetInfo().name, instr.hex);
  512. break;
  513. }
  514. break;
  515. }
  516. }
  517. ++state.program_counter;
  518. ++iteration;
  519. }
  520. }
  521. // Explicit instantiation
  522. template void RunInterpreter(UnitState<false>& state);
  523. template void RunInterpreter(UnitState<true>& state);
  524. } // namespace
  525. } // namespace