dma_pusher.cpp 8.3 KB

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  1. // SPDX-FileCopyrightText: Copyright 2018 yuzu Emulator Project
  2. // SPDX-License-Identifier: GPL-2.0-or-later
  3. #include "common/cityhash.h"
  4. #include "common/microprofile.h"
  5. #include "common/settings.h"
  6. #include "core/core.h"
  7. #include "video_core/dma_pusher.h"
  8. #include "video_core/engines/maxwell_3d.h"
  9. #include "video_core/gpu.h"
  10. #include "video_core/guest_memory.h"
  11. #include "video_core/memory_manager.h"
  12. namespace Tegra {
  13. constexpr u32 MacroRegistersStart = 0xE00;
  14. constexpr u32 ComputeInline = 0x6D;
  15. DmaPusher::DmaPusher(Core::System& system_, GPU& gpu_, MemoryManager& memory_manager_,
  16. Control::ChannelState& channel_state_)
  17. : gpu{gpu_}, system{system_}, memory_manager{memory_manager_}, puller{gpu_, memory_manager_,
  18. *this, channel_state_} {}
  19. DmaPusher::~DmaPusher() = default;
  20. MICROPROFILE_DEFINE(DispatchCalls, "GPU", "Execute command buffer", MP_RGB(128, 128, 192));
  21. void DmaPusher::DispatchCalls() {
  22. MICROPROFILE_SCOPE(DispatchCalls);
  23. dma_pushbuffer_subindex = 0;
  24. dma_state.is_last_call = true;
  25. while (system.IsPoweredOn()) {
  26. if (!Step()) {
  27. break;
  28. }
  29. }
  30. gpu.FlushCommands();
  31. gpu.OnCommandListEnd();
  32. }
  33. bool DmaPusher::Step() {
  34. if (!ib_enable || dma_pushbuffer.empty()) {
  35. // pushbuffer empty and IB empty or nonexistent - nothing to do
  36. return false;
  37. }
  38. CommandList& command_list{dma_pushbuffer.front()};
  39. ASSERT_OR_EXECUTE(
  40. command_list.command_lists.size() || command_list.prefetch_command_list.size(), {
  41. // Somehow the command_list is empty, in order to avoid a crash
  42. // We ignore it and assume its size is 0.
  43. dma_pushbuffer.pop();
  44. dma_pushbuffer_subindex = 0;
  45. return true;
  46. });
  47. if (command_list.prefetch_command_list.size()) {
  48. // Prefetched command list from nvdrv, used for things like synchronization
  49. ProcessCommands(command_list.prefetch_command_list);
  50. dma_pushbuffer.pop();
  51. } else {
  52. const CommandListHeader command_list_header{
  53. command_list.command_lists[dma_pushbuffer_subindex++]};
  54. dma_state.dma_get = command_list_header.addr;
  55. if (dma_pushbuffer_subindex >= command_list.command_lists.size()) {
  56. // We've gone through the current list, remove it from the queue
  57. dma_pushbuffer.pop();
  58. dma_pushbuffer_subindex = 0;
  59. }
  60. if (command_list_header.size == 0) {
  61. return true;
  62. }
  63. // Push buffer non-empty, read a word
  64. if (dma_state.method >= MacroRegistersStart) {
  65. if (subchannels[dma_state.subchannel]) {
  66. subchannels[dma_state.subchannel]->current_dirty = memory_manager.IsMemoryDirty(
  67. dma_state.dma_get, command_list_header.size * sizeof(u32));
  68. }
  69. }
  70. const auto safe_process = [&] {
  71. Tegra::Memory::GpuGuestMemory<Tegra::CommandHeader,
  72. Tegra::Memory::GuestMemoryFlags::SafeRead>
  73. headers(memory_manager, dma_state.dma_get, command_list_header.size,
  74. &command_headers);
  75. ProcessCommands(headers);
  76. };
  77. const auto unsafe_process = [&] {
  78. Tegra::Memory::GpuGuestMemory<Tegra::CommandHeader,
  79. Tegra::Memory::GuestMemoryFlags::UnsafeRead>
  80. headers(memory_manager, dma_state.dma_get, command_list_header.size,
  81. &command_headers);
  82. ProcessCommands(headers);
  83. };
  84. if (Settings::IsGPULevelHigh()) {
  85. if (dma_state.method >= MacroRegistersStart) {
  86. unsafe_process();
  87. return true;
  88. }
  89. if (subchannel_type[dma_state.subchannel] == Engines::EngineTypes::KeplerCompute &&
  90. dma_state.method == ComputeInline) {
  91. unsafe_process();
  92. return true;
  93. }
  94. safe_process();
  95. return true;
  96. }
  97. unsafe_process();
  98. }
  99. return true;
  100. }
  101. void DmaPusher::ProcessCommands(std::span<const CommandHeader> commands) {
  102. for (std::size_t index = 0; index < commands.size();) {
  103. const CommandHeader& command_header = commands[index];
  104. if (dma_state.method_count) {
  105. // Data word of methods command
  106. dma_state.dma_word_offset = static_cast<u32>(index * sizeof(u32));
  107. if (dma_state.non_incrementing) {
  108. const u32 max_write = static_cast<u32>(
  109. std::min<std::size_t>(index + dma_state.method_count, commands.size()) - index);
  110. CallMultiMethod(&command_header.argument, max_write);
  111. dma_state.method_count -= max_write;
  112. dma_state.is_last_call = true;
  113. index += max_write;
  114. continue;
  115. } else {
  116. dma_state.is_last_call = dma_state.method_count <= 1;
  117. CallMethod(command_header.argument);
  118. }
  119. if (!dma_state.non_incrementing) {
  120. dma_state.method++;
  121. }
  122. if (dma_increment_once) {
  123. dma_state.non_incrementing = true;
  124. }
  125. dma_state.method_count--;
  126. } else {
  127. // No command active - this is the first word of a new one
  128. switch (command_header.mode) {
  129. case SubmissionMode::Increasing:
  130. SetState(command_header);
  131. dma_state.non_incrementing = false;
  132. dma_increment_once = false;
  133. break;
  134. case SubmissionMode::NonIncreasing:
  135. SetState(command_header);
  136. dma_state.non_incrementing = true;
  137. dma_increment_once = false;
  138. break;
  139. case SubmissionMode::Inline:
  140. dma_state.method = command_header.method;
  141. dma_state.subchannel = command_header.subchannel;
  142. dma_state.dma_word_offset = static_cast<u64>(
  143. -static_cast<s64>(dma_state.dma_get)); // negate to set address as 0
  144. CallMethod(command_header.arg_count);
  145. dma_state.non_incrementing = true;
  146. dma_increment_once = false;
  147. break;
  148. case SubmissionMode::IncreaseOnce:
  149. SetState(command_header);
  150. dma_state.non_incrementing = false;
  151. dma_increment_once = true;
  152. break;
  153. default:
  154. break;
  155. }
  156. }
  157. index++;
  158. }
  159. }
  160. void DmaPusher::SetState(const CommandHeader& command_header) {
  161. dma_state.method = command_header.method;
  162. dma_state.subchannel = command_header.subchannel;
  163. dma_state.method_count = command_header.method_count;
  164. }
  165. void DmaPusher::CallMethod(u32 argument) const {
  166. if (dma_state.method < non_puller_methods) {
  167. puller.CallPullerMethod(Engines::Puller::MethodCall{
  168. dma_state.method,
  169. argument,
  170. dma_state.subchannel,
  171. dma_state.method_count,
  172. });
  173. } else {
  174. auto subchannel = subchannels[dma_state.subchannel];
  175. if (!subchannel->execution_mask[dma_state.method]) [[likely]] {
  176. subchannel->method_sink.emplace_back(dma_state.method, argument);
  177. return;
  178. }
  179. subchannel->ConsumeSink();
  180. subchannel->current_dma_segment = dma_state.dma_get + dma_state.dma_word_offset;
  181. subchannel->CallMethod(dma_state.method, argument, dma_state.is_last_call);
  182. }
  183. }
  184. void DmaPusher::CallMultiMethod(const u32* base_start, u32 num_methods) const {
  185. if (dma_state.method < non_puller_methods) {
  186. puller.CallMultiMethod(dma_state.method, dma_state.subchannel, base_start, num_methods,
  187. dma_state.method_count);
  188. } else {
  189. auto subchannel = subchannels[dma_state.subchannel];
  190. subchannel->ConsumeSink();
  191. subchannel->current_dma_segment = dma_state.dma_get + dma_state.dma_word_offset;
  192. subchannel->CallMultiMethod(dma_state.method, base_start, num_methods,
  193. dma_state.method_count);
  194. }
  195. }
  196. void DmaPusher::BindRasterizer(VideoCore::RasterizerInterface* rasterizer) {
  197. puller.BindRasterizer(rasterizer);
  198. }
  199. } // namespace Tegra