arminit.cpp 3.4 KB

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  1. /* arminit.c -- ARMulator initialization: ARM6 Instruction Emulator.
  2. Copyright (C) 1994 Advanced RISC Machines Ltd.
  3. This program is free software; you can redistribute it and/or modify
  4. it under the terms of the GNU General Public License as published by
  5. the Free Software Foundation; either version 2 of the License, or
  6. (at your option) any later version.
  7. This program is distributed in the hope that it will be useful,
  8. but WITHOUT ANY WARRANTY; without even the implied warranty of
  9. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  10. GNU General Public License for more details.
  11. You should have received a copy of the GNU General Public License
  12. along with this program; if not, write to the Free Software
  13. Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
  14. #include "core/arm/skyeye_common/armdefs.h"
  15. #include "core/arm/skyeye_common/armemu.h"
  16. /***************************************************************************\
  17. * Returns a new instantiation of the ARMulator's state *
  18. \***************************************************************************/
  19. ARMul_State* ARMul_NewState(ARMul_State* state)
  20. {
  21. memset (state, 0, sizeof (ARMul_State));
  22. state->Emulate = RUN;
  23. for (unsigned int i = 0; i < 16; i++) {
  24. state->Reg[i] = 0;
  25. for (unsigned int j = 0; j < 7; j++)
  26. state->RegBank[j][i] = 0;
  27. }
  28. for (unsigned int i = 0; i < 7; i++)
  29. state->Spsr[i] = 0;
  30. state->Mode = USER32MODE;
  31. state->VectorCatch = 0;
  32. state->Aborted = false;
  33. state->Reseted = false;
  34. state->Inted = 3;
  35. state->LastInted = 3;
  36. state->lateabtSig = HIGH;
  37. state->bigendSig = LOW;
  38. return state;
  39. }
  40. /***************************************************************************\
  41. * Call this routine to set ARMulator to model a certain processor *
  42. \***************************************************************************/
  43. void ARMul_SelectProcessor(ARMul_State* state, unsigned properties)
  44. {
  45. state->is_v4 = (properties & (ARM_v4_Prop | ARM_v5_Prop)) != 0;
  46. state->is_v5 = (properties & ARM_v5_Prop) != 0;
  47. state->is_v5e = (properties & ARM_v5e_Prop) != 0;
  48. state->is_XScale = (properties & ARM_XScale_Prop) != 0;
  49. state->is_iWMMXt = (properties & ARM_iWMMXt_Prop) != 0;
  50. state->is_v6 = (properties & ARM_v6_Prop) != 0;
  51. state->is_ep9312 = (properties & ARM_ep9312_Prop) != 0;
  52. state->is_pxa27x = (properties & ARM_PXA27X_Prop) != 0;
  53. state->is_v7 = (properties & ARM_v7_Prop) != 0;
  54. // Only initialse the coprocessor support once we
  55. // know what kind of chip we are dealing with.
  56. ARMul_CoProInit(state);
  57. }
  58. /***************************************************************************\
  59. * Call this routine to set up the initial machine state (or perform a RESET *
  60. \***************************************************************************/
  61. void ARMul_Reset(ARMul_State* state)
  62. {
  63. state->NextInstr = 0;
  64. state->Reg[15] = 0;
  65. state->Cpsr = INTBITS | SVC32MODE;
  66. state->Mode = SVC32MODE;
  67. state->Bank = SVCBANK;
  68. FLUSHPIPE;
  69. state->EndCondition = 0;
  70. state->ErrorCode = 0;
  71. state->NresetSig = HIGH;
  72. state->NfiqSig = HIGH;
  73. state->NirqSig = HIGH;
  74. state->NtransSig = (state->Mode & 3) ? HIGH : LOW;
  75. state->abortSig = LOW;
  76. state->AbortAddr = 1;
  77. state->NumInstrs = 0;
  78. }