memory.h 3.0 KB

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  1. // Copyright 2014 Citra Emulator Project
  2. // Licensed under GPLv2 or any later version
  3. // Refer to the license.txt file included.
  4. #pragma once
  5. #include <cstddef>
  6. #include <string>
  7. #include "common/common_types.h"
  8. namespace Common {
  9. struct PageTable;
  10. }
  11. namespace Kernel {
  12. class Process;
  13. }
  14. namespace Memory {
  15. /**
  16. * Page size used by the ARM architecture. This is the smallest granularity with which memory can
  17. * be mapped.
  18. */
  19. constexpr std::size_t PAGE_BITS = 12;
  20. constexpr u64 PAGE_SIZE = 1ULL << PAGE_BITS;
  21. constexpr u64 PAGE_MASK = PAGE_SIZE - 1;
  22. /// Virtual user-space memory regions
  23. enum : VAddr {
  24. /// Read-only page containing kernel and system configuration values.
  25. CONFIG_MEMORY_VADDR = 0x1FF80000,
  26. CONFIG_MEMORY_SIZE = 0x00001000,
  27. CONFIG_MEMORY_VADDR_END = CONFIG_MEMORY_VADDR + CONFIG_MEMORY_SIZE,
  28. /// Usually read-only page containing mostly values read from hardware.
  29. SHARED_PAGE_VADDR = 0x1FF81000,
  30. SHARED_PAGE_SIZE = 0x00001000,
  31. SHARED_PAGE_VADDR_END = SHARED_PAGE_VADDR + SHARED_PAGE_SIZE,
  32. /// TLS (Thread-Local Storage) related.
  33. TLS_ENTRY_SIZE = 0x200,
  34. /// Application stack
  35. DEFAULT_STACK_SIZE = 0x100000,
  36. /// Kernel Virtual Address Range
  37. KERNEL_REGION_VADDR = 0xFFFFFF8000000000,
  38. KERNEL_REGION_SIZE = 0x7FFFE00000,
  39. KERNEL_REGION_END = KERNEL_REGION_VADDR + KERNEL_REGION_SIZE,
  40. };
  41. /// Currently active page table
  42. void SetCurrentPageTable(Common::PageTable* page_table);
  43. Common::PageTable* GetCurrentPageTable();
  44. /// Determines if the given VAddr is valid for the specified process.
  45. bool IsValidVirtualAddress(const Kernel::Process& process, VAddr vaddr);
  46. bool IsValidVirtualAddress(VAddr vaddr);
  47. /// Determines if the given VAddr is a kernel address
  48. bool IsKernelVirtualAddress(VAddr vaddr);
  49. u8 Read8(VAddr addr);
  50. u16 Read16(VAddr addr);
  51. u32 Read32(VAddr addr);
  52. u64 Read64(VAddr addr);
  53. void Write8(VAddr addr, u8 data);
  54. void Write16(VAddr addr, u16 data);
  55. void Write32(VAddr addr, u32 data);
  56. void Write64(VAddr addr, u64 data);
  57. void ReadBlock(const Kernel::Process& process, VAddr src_addr, void* dest_buffer, std::size_t size);
  58. void ReadBlock(VAddr src_addr, void* dest_buffer, std::size_t size);
  59. void WriteBlock(const Kernel::Process& process, VAddr dest_addr, const void* src_buffer,
  60. std::size_t size);
  61. void WriteBlock(VAddr dest_addr, const void* src_buffer, std::size_t size);
  62. void ZeroBlock(const Kernel::Process& process, VAddr dest_addr, std::size_t size);
  63. void CopyBlock(VAddr dest_addr, VAddr src_addr, std::size_t size);
  64. u8* GetPointer(VAddr vaddr);
  65. std::string ReadCString(VAddr vaddr, std::size_t max_length);
  66. enum class FlushMode {
  67. /// Write back modified surfaces to RAM
  68. Flush,
  69. /// Remove region from the cache
  70. Invalidate,
  71. /// Write back modified surfaces to RAM, and also remove them from the cache
  72. FlushAndInvalidate,
  73. };
  74. /**
  75. * Mark each page touching the region as cached.
  76. */
  77. void RasterizerMarkRegionCached(VAddr vaddr, u64 size, bool cached);
  78. } // namespace Memory