memory.h 8.9 KB

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  1. // Copyright 2014 Citra Emulator Project
  2. // Licensed under GPLv2 or any later version
  3. // Refer to the license.txt file included.
  4. #pragma once
  5. #include <array>
  6. #include <cstddef>
  7. #include <map>
  8. #include <string>
  9. #include <tuple>
  10. #include <vector>
  11. #include <boost/icl/interval_map.hpp>
  12. #include <boost/optional.hpp>
  13. #include "common/common_types.h"
  14. #include "core/memory_hook.h"
  15. #include "video_core/memory_manager.h"
  16. namespace Kernel {
  17. class Process;
  18. }
  19. namespace Memory {
  20. /**
  21. * Page size used by the ARM architecture. This is the smallest granularity with which memory can
  22. * be mapped.
  23. */
  24. constexpr size_t PAGE_BITS = 12;
  25. constexpr u64 PAGE_SIZE = 1 << PAGE_BITS;
  26. constexpr u64 PAGE_MASK = PAGE_SIZE - 1;
  27. constexpr size_t ADDRESS_SPACE_BITS = 36;
  28. constexpr size_t PAGE_TABLE_NUM_ENTRIES = 1ULL << (ADDRESS_SPACE_BITS - PAGE_BITS);
  29. enum class PageType : u8 {
  30. /// Page is unmapped and should cause an access error.
  31. Unmapped,
  32. /// Page is mapped to regular memory. This is the only type you can get pointers to.
  33. Memory,
  34. /// Page is mapped to regular memory, but also needs to check for rasterizer cache flushing and
  35. /// invalidation
  36. RasterizerCachedMemory,
  37. /// Page is mapped to a I/O region. Writing and reading to this page is handled by functions.
  38. Special,
  39. };
  40. struct SpecialRegion {
  41. enum class Type {
  42. DebugHook,
  43. IODevice,
  44. } type;
  45. MemoryHookPointer handler;
  46. bool operator<(const SpecialRegion& other) const {
  47. return std::tie(type, handler) < std::tie(other.type, other.handler);
  48. }
  49. bool operator==(const SpecialRegion& other) const {
  50. return std::tie(type, handler) == std::tie(other.type, other.handler);
  51. }
  52. };
  53. /**
  54. * A (reasonably) fast way of allowing switchable and remappable process address spaces. It loosely
  55. * mimics the way a real CPU page table works.
  56. */
  57. struct PageTable {
  58. /**
  59. * Array of memory pointers backing each page. An entry can only be non-null if the
  60. * corresponding entry in the `attributes` array is of type `Memory`.
  61. */
  62. std::array<u8*, PAGE_TABLE_NUM_ENTRIES> pointers;
  63. /**
  64. * Contains MMIO handlers that back memory regions whose entries in the `attribute` array is of
  65. * type `Special`.
  66. */
  67. boost::icl::interval_map<VAddr, std::set<SpecialRegion>> special_regions;
  68. /**
  69. * Array of fine grained page attributes. If it is set to any value other than `Memory`, then
  70. * the corresponding entry in `pointers` MUST be set to null.
  71. */
  72. std::array<PageType, PAGE_TABLE_NUM_ENTRIES> attributes;
  73. };
  74. /// Physical memory regions as seen from the ARM11
  75. enum : PAddr {
  76. /// IO register area
  77. IO_AREA_PADDR = 0x10100000,
  78. IO_AREA_SIZE = 0x01000000, ///< IO area size (16MB)
  79. IO_AREA_PADDR_END = IO_AREA_PADDR + IO_AREA_SIZE,
  80. /// MPCore internal memory region
  81. MPCORE_RAM_PADDR = 0x17E00000,
  82. MPCORE_RAM_SIZE = 0x00002000, ///< MPCore internal memory size (8KB)
  83. MPCORE_RAM_PADDR_END = MPCORE_RAM_PADDR + MPCORE_RAM_SIZE,
  84. /// Video memory
  85. VRAM_PADDR = 0x18000000,
  86. VRAM_SIZE = 0x00600000, ///< VRAM size (6MB)
  87. VRAM_PADDR_END = VRAM_PADDR + VRAM_SIZE,
  88. /// DSP memory
  89. DSP_RAM_PADDR = 0x1FF00000,
  90. DSP_RAM_SIZE = 0x00080000, ///< DSP memory size (512KB)
  91. DSP_RAM_PADDR_END = DSP_RAM_PADDR + DSP_RAM_SIZE,
  92. /// AXI WRAM
  93. AXI_WRAM_PADDR = 0x1FF80000,
  94. AXI_WRAM_SIZE = 0x00080000, ///< AXI WRAM size (512KB)
  95. AXI_WRAM_PADDR_END = AXI_WRAM_PADDR + AXI_WRAM_SIZE,
  96. /// Main FCRAM
  97. FCRAM_PADDR = 0x20000000,
  98. FCRAM_SIZE = 0x08000000, ///< FCRAM size on the Old 3DS (128MB)
  99. FCRAM_N3DS_SIZE = 0x10000000, ///< FCRAM size on the New 3DS (256MB)
  100. FCRAM_PADDR_END = FCRAM_PADDR + FCRAM_SIZE,
  101. };
  102. /// Virtual user-space memory regions
  103. enum : VAddr {
  104. /// Where the application text, data and bss reside.
  105. PROCESS_IMAGE_VADDR = 0x08000000,
  106. PROCESS_IMAGE_MAX_SIZE = 0x08000000,
  107. PROCESS_IMAGE_VADDR_END = PROCESS_IMAGE_VADDR + PROCESS_IMAGE_MAX_SIZE,
  108. /// Maps 1:1 to an offset in FCRAM. Used for HW allocations that need to be linear in physical
  109. /// memory.
  110. LINEAR_HEAP_VADDR = 0x14000000,
  111. LINEAR_HEAP_SIZE = 0x08000000,
  112. LINEAR_HEAP_VADDR_END = LINEAR_HEAP_VADDR + LINEAR_HEAP_SIZE,
  113. /// Maps 1:1 to the IO register area.
  114. IO_AREA_VADDR = 0x1EC00000,
  115. IO_AREA_VADDR_END = IO_AREA_VADDR + IO_AREA_SIZE,
  116. /// Maps 1:1 to VRAM.
  117. VRAM_VADDR = 0x1F000000,
  118. VRAM_VADDR_END = VRAM_VADDR + VRAM_SIZE,
  119. /// Maps 1:1 to DSP memory.
  120. DSP_RAM_VADDR = 0x1FF00000,
  121. DSP_RAM_VADDR_END = DSP_RAM_VADDR + DSP_RAM_SIZE,
  122. /// Read-only page containing kernel and system configuration values.
  123. CONFIG_MEMORY_VADDR = 0x1FF80000,
  124. CONFIG_MEMORY_SIZE = 0x00001000,
  125. CONFIG_MEMORY_VADDR_END = CONFIG_MEMORY_VADDR + CONFIG_MEMORY_SIZE,
  126. /// Usually read-only page containing mostly values read from hardware.
  127. SHARED_PAGE_VADDR = 0x1FF81000,
  128. SHARED_PAGE_SIZE = 0x00001000,
  129. SHARED_PAGE_VADDR_END = SHARED_PAGE_VADDR + SHARED_PAGE_SIZE,
  130. /// Equivalent to LINEAR_HEAP_VADDR, but expanded to cover the extra memory in the New 3DS.
  131. NEW_LINEAR_HEAP_VADDR = 0x30000000,
  132. NEW_LINEAR_HEAP_SIZE = 0x10000000,
  133. NEW_LINEAR_HEAP_VADDR_END = NEW_LINEAR_HEAP_VADDR + NEW_LINEAR_HEAP_SIZE,
  134. /// Area where TLS (Thread-Local Storage) buffers are allocated.
  135. TLS_AREA_VADDR = NEW_LINEAR_HEAP_VADDR_END,
  136. TLS_ENTRY_SIZE = 0x200,
  137. TLS_AREA_SIZE = 0x10000000,
  138. TLS_AREA_VADDR_END = TLS_AREA_VADDR + TLS_AREA_SIZE,
  139. /// Application stack
  140. STACK_AREA_VADDR = TLS_AREA_VADDR_END,
  141. STACK_AREA_SIZE = 0x10000000,
  142. STACK_AREA_VADDR_END = STACK_AREA_VADDR + STACK_AREA_SIZE,
  143. DEFAULT_STACK_SIZE = 0x100000,
  144. /// Application heap
  145. /// Size is confirmed to be a static value on fw 3.0.0
  146. HEAP_VADDR = 0x108000000,
  147. HEAP_SIZE = 0x180000000,
  148. HEAP_VADDR_END = HEAP_VADDR + HEAP_SIZE,
  149. /// New map region
  150. /// Size is confirmed to be a static value on fw 3.0.0
  151. NEW_MAP_REGION_VADDR = HEAP_VADDR_END,
  152. NEW_MAP_REGION_SIZE = 0x80000000,
  153. NEW_MAP_REGION_VADDR_END = NEW_MAP_REGION_VADDR + NEW_MAP_REGION_SIZE,
  154. /// Map region
  155. /// Size is confirmed to be a static value on fw 3.0.0
  156. MAP_REGION_VADDR = NEW_MAP_REGION_VADDR_END,
  157. MAP_REGION_SIZE = 0x1000000000,
  158. MAP_REGION_VADDR_END = MAP_REGION_VADDR + MAP_REGION_SIZE,
  159. };
  160. /// Currently active page table
  161. void SetCurrentPageTable(PageTable* page_table);
  162. PageTable* GetCurrentPageTable();
  163. /// Determines if the given VAddr is valid for the specified process.
  164. bool IsValidVirtualAddress(const Kernel::Process& process, const VAddr vaddr);
  165. bool IsValidVirtualAddress(const VAddr addr);
  166. bool IsValidPhysicalAddress(const PAddr addr);
  167. u8 Read8(VAddr addr);
  168. u16 Read16(VAddr addr);
  169. u32 Read32(VAddr addr);
  170. u64 Read64(VAddr addr);
  171. void Write8(VAddr addr, u8 data);
  172. void Write16(VAddr addr, u16 data);
  173. void Write32(VAddr addr, u32 data);
  174. void Write64(VAddr addr, u64 data);
  175. void ReadBlock(const Kernel::Process& process, const VAddr src_addr, void* dest_buffer,
  176. size_t size);
  177. void ReadBlock(const VAddr src_addr, void* dest_buffer, size_t size);
  178. void WriteBlock(const Kernel::Process& process, const VAddr dest_addr, const void* src_buffer,
  179. size_t size);
  180. void WriteBlock(const VAddr dest_addr, const void* src_buffer, size_t size);
  181. void ZeroBlock(const VAddr dest_addr, const size_t size);
  182. void CopyBlock(VAddr dest_addr, VAddr src_addr, size_t size);
  183. u8* GetPointer(VAddr virtual_address);
  184. std::string ReadCString(VAddr virtual_address, std::size_t max_length);
  185. /**
  186. * Converts a virtual address inside a region with 1:1 mapping to physical memory to a physical
  187. * address. This should be used by services to translate addresses for use by the hardware.
  188. */
  189. boost::optional<PAddr> TryVirtualToPhysicalAddress(VAddr addr);
  190. /**
  191. * Converts a virtual address inside a region with 1:1 mapping to physical memory to a physical
  192. * address. This should be used by services to translate addresses for use by the hardware.
  193. *
  194. * @deprecated Use TryVirtualToPhysicalAddress(), which reports failure.
  195. */
  196. PAddr VirtualToPhysicalAddress(VAddr addr);
  197. /**
  198. * Undoes a mapping performed by VirtualToPhysicalAddress().
  199. */
  200. boost::optional<VAddr> PhysicalToVirtualAddress(PAddr addr);
  201. /**
  202. * Gets a pointer to the memory region beginning at the specified physical address.
  203. */
  204. u8* GetPhysicalPointer(PAddr address);
  205. enum class FlushMode {
  206. /// Write back modified surfaces to RAM
  207. Flush,
  208. /// Remove region from the cache
  209. Invalidate,
  210. /// Write back modified surfaces to RAM, and also remove them from the cache
  211. FlushAndInvalidate,
  212. };
  213. /**
  214. * Mark each page touching the region as cached.
  215. */
  216. void RasterizerMarkRegionCached(Tegra::GPUVAddr start, u64 size, bool cached);
  217. /**
  218. * Flushes and invalidates any externally cached rasterizer resources touching the given virtual
  219. * address region.
  220. */
  221. void RasterizerFlushVirtualRegion(VAddr start, u64 size, FlushMode mode);
  222. } // namespace Memory