memory.h 8.8 KB

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  1. // Copyright 2014 Citra Emulator Project
  2. // Licensed under GPLv2 or any later version
  3. // Refer to the license.txt file included.
  4. #pragma once
  5. #include <array>
  6. #include <cstddef>
  7. #include <map>
  8. #include <string>
  9. #include <tuple>
  10. #include <vector>
  11. #include <boost/icl/interval_map.hpp>
  12. #include <boost/optional.hpp>
  13. #include "common/common_types.h"
  14. #include "core/memory_hook.h"
  15. namespace Kernel {
  16. class Process;
  17. }
  18. namespace Memory {
  19. /**
  20. * Page size used by the ARM architecture. This is the smallest granularity with which memory can
  21. * be mapped.
  22. */
  23. constexpr size_t PAGE_BITS = 12;
  24. constexpr u64 PAGE_SIZE = 1 << PAGE_BITS;
  25. constexpr u64 PAGE_MASK = PAGE_SIZE - 1;
  26. constexpr size_t ADDRESS_SPACE_BITS = 36;
  27. constexpr size_t PAGE_TABLE_NUM_ENTRIES = 1ULL << (ADDRESS_SPACE_BITS - PAGE_BITS);
  28. enum class PageType : u8 {
  29. /// Page is unmapped and should cause an access error.
  30. Unmapped,
  31. /// Page is mapped to regular memory. This is the only type you can get pointers to.
  32. Memory,
  33. /// Page is mapped to regular memory, but also needs to check for rasterizer cache flushing and
  34. /// invalidation
  35. RasterizerCachedMemory,
  36. /// Page is mapped to a I/O region. Writing and reading to this page is handled by functions.
  37. Special,
  38. };
  39. struct SpecialRegion {
  40. enum class Type {
  41. DebugHook,
  42. IODevice,
  43. } type;
  44. MemoryHookPointer handler;
  45. bool operator<(const SpecialRegion& other) const {
  46. return std::tie(type, handler) < std::tie(other.type, other.handler);
  47. }
  48. bool operator==(const SpecialRegion& other) const {
  49. return std::tie(type, handler) == std::tie(other.type, other.handler);
  50. }
  51. };
  52. /**
  53. * A (reasonably) fast way of allowing switchable and remappable process address spaces. It loosely
  54. * mimics the way a real CPU page table works.
  55. */
  56. struct PageTable {
  57. /**
  58. * Array of memory pointers backing each page. An entry can only be non-null if the
  59. * corresponding entry in the `attributes` array is of type `Memory`.
  60. */
  61. std::array<u8*, PAGE_TABLE_NUM_ENTRIES> pointers;
  62. /**
  63. * Contains MMIO handlers that back memory regions whose entries in the `attribute` array is of
  64. * type `Special`.
  65. */
  66. boost::icl::interval_map<VAddr, std::set<SpecialRegion>> special_regions;
  67. /**
  68. * Array of fine grained page attributes. If it is set to any value other than `Memory`, then
  69. * the corresponding entry in `pointers` MUST be set to null.
  70. */
  71. std::array<PageType, PAGE_TABLE_NUM_ENTRIES> attributes;
  72. };
  73. /// Physical memory regions as seen from the ARM11
  74. enum : PAddr {
  75. /// IO register area
  76. IO_AREA_PADDR = 0x10100000,
  77. IO_AREA_SIZE = 0x01000000, ///< IO area size (16MB)
  78. IO_AREA_PADDR_END = IO_AREA_PADDR + IO_AREA_SIZE,
  79. /// MPCore internal memory region
  80. MPCORE_RAM_PADDR = 0x17E00000,
  81. MPCORE_RAM_SIZE = 0x00002000, ///< MPCore internal memory size (8KB)
  82. MPCORE_RAM_PADDR_END = MPCORE_RAM_PADDR + MPCORE_RAM_SIZE,
  83. /// Video memory
  84. VRAM_PADDR = 0x18000000,
  85. VRAM_SIZE = 0x00600000, ///< VRAM size (6MB)
  86. VRAM_PADDR_END = VRAM_PADDR + VRAM_SIZE,
  87. /// DSP memory
  88. DSP_RAM_PADDR = 0x1FF00000,
  89. DSP_RAM_SIZE = 0x00080000, ///< DSP memory size (512KB)
  90. DSP_RAM_PADDR_END = DSP_RAM_PADDR + DSP_RAM_SIZE,
  91. /// AXI WRAM
  92. AXI_WRAM_PADDR = 0x1FF80000,
  93. AXI_WRAM_SIZE = 0x00080000, ///< AXI WRAM size (512KB)
  94. AXI_WRAM_PADDR_END = AXI_WRAM_PADDR + AXI_WRAM_SIZE,
  95. /// Main FCRAM
  96. FCRAM_PADDR = 0x20000000,
  97. FCRAM_SIZE = 0x08000000, ///< FCRAM size on the Old 3DS (128MB)
  98. FCRAM_N3DS_SIZE = 0x10000000, ///< FCRAM size on the New 3DS (256MB)
  99. FCRAM_PADDR_END = FCRAM_PADDR + FCRAM_SIZE,
  100. };
  101. /// Virtual user-space memory regions
  102. enum : VAddr {
  103. /// Where the application text, data and bss reside.
  104. PROCESS_IMAGE_VADDR = 0x08000000,
  105. PROCESS_IMAGE_MAX_SIZE = 0x08000000,
  106. PROCESS_IMAGE_VADDR_END = PROCESS_IMAGE_VADDR + PROCESS_IMAGE_MAX_SIZE,
  107. /// Maps 1:1 to an offset in FCRAM. Used for HW allocations that need to be linear in physical
  108. /// memory.
  109. LINEAR_HEAP_VADDR = 0x14000000,
  110. LINEAR_HEAP_SIZE = 0x08000000,
  111. LINEAR_HEAP_VADDR_END = LINEAR_HEAP_VADDR + LINEAR_HEAP_SIZE,
  112. /// Maps 1:1 to the IO register area.
  113. IO_AREA_VADDR = 0x1EC00000,
  114. IO_AREA_VADDR_END = IO_AREA_VADDR + IO_AREA_SIZE,
  115. /// Maps 1:1 to VRAM.
  116. VRAM_VADDR = 0x1F000000,
  117. VRAM_VADDR_END = VRAM_VADDR + VRAM_SIZE,
  118. /// Maps 1:1 to DSP memory.
  119. DSP_RAM_VADDR = 0x1FF00000,
  120. DSP_RAM_VADDR_END = DSP_RAM_VADDR + DSP_RAM_SIZE,
  121. /// Read-only page containing kernel and system configuration values.
  122. CONFIG_MEMORY_VADDR = 0x1FF80000,
  123. CONFIG_MEMORY_SIZE = 0x00001000,
  124. CONFIG_MEMORY_VADDR_END = CONFIG_MEMORY_VADDR + CONFIG_MEMORY_SIZE,
  125. /// Usually read-only page containing mostly values read from hardware.
  126. SHARED_PAGE_VADDR = 0x1FF81000,
  127. SHARED_PAGE_SIZE = 0x00001000,
  128. SHARED_PAGE_VADDR_END = SHARED_PAGE_VADDR + SHARED_PAGE_SIZE,
  129. /// Equivalent to LINEAR_HEAP_VADDR, but expanded to cover the extra memory in the New 3DS.
  130. NEW_LINEAR_HEAP_VADDR = 0x30000000,
  131. NEW_LINEAR_HEAP_SIZE = 0x10000000,
  132. NEW_LINEAR_HEAP_VADDR_END = NEW_LINEAR_HEAP_VADDR + NEW_LINEAR_HEAP_SIZE,
  133. /// Area where TLS (Thread-Local Storage) buffers are allocated.
  134. TLS_AREA_VADDR = NEW_LINEAR_HEAP_VADDR_END,
  135. TLS_ENTRY_SIZE = 0x200,
  136. TLS_AREA_SIZE = 0x10000000,
  137. TLS_AREA_VADDR_END = TLS_AREA_VADDR + TLS_AREA_SIZE,
  138. /// Application stack
  139. STACK_AREA_VADDR = TLS_AREA_VADDR_END,
  140. STACK_AREA_SIZE = 0x10000000,
  141. STACK_AREA_VADDR_END = STACK_AREA_VADDR + STACK_AREA_SIZE,
  142. DEFAULT_STACK_SIZE = 0x100000,
  143. /// Application heap
  144. /// Size is confirmed to be a static value on fw 3.0.0
  145. HEAP_VADDR = 0x108000000,
  146. HEAP_SIZE = 0x180000000,
  147. HEAP_VADDR_END = HEAP_VADDR + HEAP_SIZE,
  148. /// New map region
  149. /// Size is confirmed to be a static value on fw 3.0.0
  150. NEW_MAP_REGION_VADDR = HEAP_VADDR_END,
  151. NEW_MAP_REGION_SIZE = 0x80000000,
  152. NEW_MAP_REGION_VADDR_END = NEW_MAP_REGION_VADDR + NEW_MAP_REGION_SIZE,
  153. /// Map region
  154. /// Size is confirmed to be a static value on fw 3.0.0
  155. MAP_REGION_VADDR = NEW_MAP_REGION_VADDR_END,
  156. MAP_REGION_SIZE = 0x1000000000,
  157. MAP_REGION_VADDR_END = MAP_REGION_VADDR + MAP_REGION_SIZE,
  158. };
  159. /// Currently active page table
  160. void SetCurrentPageTable(PageTable* page_table);
  161. PageTable* GetCurrentPageTable();
  162. /// Determines if the given VAddr is valid for the specified process.
  163. bool IsValidVirtualAddress(const Kernel::Process& process, const VAddr vaddr);
  164. bool IsValidVirtualAddress(const VAddr addr);
  165. bool IsValidPhysicalAddress(const PAddr addr);
  166. u8 Read8(VAddr addr);
  167. u16 Read16(VAddr addr);
  168. u32 Read32(VAddr addr);
  169. u64 Read64(VAddr addr);
  170. void Write8(VAddr addr, u8 data);
  171. void Write16(VAddr addr, u16 data);
  172. void Write32(VAddr addr, u32 data);
  173. void Write64(VAddr addr, u64 data);
  174. void ReadBlock(const Kernel::Process& process, const VAddr src_addr, void* dest_buffer,
  175. size_t size);
  176. void ReadBlock(const VAddr src_addr, void* dest_buffer, size_t size);
  177. void WriteBlock(const Kernel::Process& process, const VAddr dest_addr, const void* src_buffer,
  178. size_t size);
  179. void WriteBlock(const VAddr dest_addr, const void* src_buffer, size_t size);
  180. void ZeroBlock(const VAddr dest_addr, const size_t size);
  181. void CopyBlock(VAddr dest_addr, VAddr src_addr, size_t size);
  182. u8* GetPointer(VAddr virtual_address);
  183. std::string ReadCString(VAddr virtual_address, std::size_t max_length);
  184. /**
  185. * Converts a virtual address inside a region with 1:1 mapping to physical memory to a physical
  186. * address. This should be used by services to translate addresses for use by the hardware.
  187. */
  188. boost::optional<PAddr> TryVirtualToPhysicalAddress(VAddr addr);
  189. /**
  190. * Converts a virtual address inside a region with 1:1 mapping to physical memory to a physical
  191. * address. This should be used by services to translate addresses for use by the hardware.
  192. *
  193. * @deprecated Use TryVirtualToPhysicalAddress(), which reports failure.
  194. */
  195. PAddr VirtualToPhysicalAddress(VAddr addr);
  196. /**
  197. * Undoes a mapping performed by VirtualToPhysicalAddress().
  198. */
  199. boost::optional<VAddr> PhysicalToVirtualAddress(PAddr addr);
  200. /**
  201. * Gets a pointer to the memory region beginning at the specified physical address.
  202. */
  203. u8* GetPhysicalPointer(PAddr address);
  204. enum class FlushMode {
  205. /// Write back modified surfaces to RAM
  206. Flush,
  207. /// Remove region from the cache
  208. Invalidate,
  209. /// Write back modified surfaces to RAM, and also remove them from the cache
  210. FlushAndInvalidate,
  211. };
  212. /**
  213. * Mark each page touching the region as cached.
  214. */
  215. void RasterizerMarkRegionCached(VAddr start, u64 size, bool cached);
  216. /**
  217. * Flushes and invalidates any externally cached rasterizer resources touching the given virtual
  218. * address region.
  219. */
  220. void RasterizerFlushVirtualRegion(VAddr start, u64 size, FlushMode mode);
  221. } // namespace Memory