shader.cpp 9.1 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199
  1. // Copyright 2015 Citra Emulator Project
  2. // Licensed under GPLv2 or any later version
  3. // Refer to the license.txt file included.
  4. #include <memory>
  5. #include <unordered_map>
  6. #include <boost/range/algorithm/fill.hpp>
  7. #include "common/hash.h"
  8. #include "common/make_unique.h"
  9. #include "common/microprofile.h"
  10. #include "common/profiler.h"
  11. #include "video_core/debug_utils/debug_utils.h"
  12. #include "video_core/pica.h"
  13. #include "video_core/pica_state.h"
  14. #include "video_core/video_core.h"
  15. #include "shader.h"
  16. #include "shader_interpreter.h"
  17. #ifdef ARCHITECTURE_x86_64
  18. #include "shader_jit_x64.h"
  19. #endif // ARCHITECTURE_x86_64
  20. namespace Pica {
  21. namespace Shader {
  22. #ifdef ARCHITECTURE_x86_64
  23. static std::unordered_map<u64, CompiledShader*> shader_map;
  24. static JitCompiler jit;
  25. static CompiledShader* jit_shader;
  26. static void ClearCache() {
  27. shader_map.clear();
  28. jit.Clear();
  29. LOG_INFO(HW_GPU, "Shader JIT cache cleared");
  30. }
  31. #endif // ARCHITECTURE_x86_64
  32. void Setup(UnitState<false>& state) {
  33. #ifdef ARCHITECTURE_x86_64
  34. if (VideoCore::g_shader_jit_enabled) {
  35. u64 cache_key = (Common::ComputeHash64(&g_state.vs.program_code, sizeof(g_state.vs.program_code)) ^
  36. Common::ComputeHash64(&g_state.vs.swizzle_data, sizeof(g_state.vs.swizzle_data)) ^
  37. g_state.regs.vs.main_offset);
  38. auto iter = shader_map.find(cache_key);
  39. if (iter != shader_map.end()) {
  40. jit_shader = iter->second;
  41. } else {
  42. // Check if remaining JIT code space is enough for at least one more (massive) shader
  43. if (jit.GetSpaceLeft() < jit_shader_size) {
  44. // If not, clear the cache of all previously compiled shaders
  45. ClearCache();
  46. }
  47. jit_shader = jit.Compile();
  48. shader_map.emplace(cache_key, jit_shader);
  49. }
  50. }
  51. #endif // ARCHITECTURE_x86_64
  52. }
  53. void Shutdown() {
  54. #ifdef ARCHITECTURE_x86_64
  55. ClearCache();
  56. #endif // ARCHITECTURE_x86_64
  57. }
  58. static Common::Profiling::TimingCategory shader_category("Vertex Shader");
  59. MICROPROFILE_DEFINE(GPU_VertexShader, "GPU", "Vertex Shader", MP_RGB(50, 50, 240));
  60. OutputVertex Run(UnitState<false>& state, const InputVertex& input, int num_attributes) {
  61. auto& config = g_state.regs.vs;
  62. Common::Profiling::ScopeTimer timer(shader_category);
  63. MICROPROFILE_SCOPE(GPU_VertexShader);
  64. state.program_counter = config.main_offset;
  65. state.debug.max_offset = 0;
  66. state.debug.max_opdesc_id = 0;
  67. // Setup input register table
  68. const auto& attribute_register_map = config.input_register_map;
  69. // TODO: Instead of this cumbersome logic, just load the input data directly like
  70. // for (int attr = 0; attr < num_attributes; ++attr) { input_attr[0] = state.registers.input[attribute_register_map.attribute0_register]; }
  71. if (num_attributes > 0) state.registers.input[attribute_register_map.attribute0_register] = input.attr[0];
  72. if (num_attributes > 1) state.registers.input[attribute_register_map.attribute1_register] = input.attr[1];
  73. if (num_attributes > 2) state.registers.input[attribute_register_map.attribute2_register] = input.attr[2];
  74. if (num_attributes > 3) state.registers.input[attribute_register_map.attribute3_register] = input.attr[3];
  75. if (num_attributes > 4) state.registers.input[attribute_register_map.attribute4_register] = input.attr[4];
  76. if (num_attributes > 5) state.registers.input[attribute_register_map.attribute5_register] = input.attr[5];
  77. if (num_attributes > 6) state.registers.input[attribute_register_map.attribute6_register] = input.attr[6];
  78. if (num_attributes > 7) state.registers.input[attribute_register_map.attribute7_register] = input.attr[7];
  79. if (num_attributes > 8) state.registers.input[attribute_register_map.attribute8_register] = input.attr[8];
  80. if (num_attributes > 9) state.registers.input[attribute_register_map.attribute9_register] = input.attr[9];
  81. if (num_attributes > 10) state.registers.input[attribute_register_map.attribute10_register] = input.attr[10];
  82. if (num_attributes > 11) state.registers.input[attribute_register_map.attribute11_register] = input.attr[11];
  83. if (num_attributes > 12) state.registers.input[attribute_register_map.attribute12_register] = input.attr[12];
  84. if (num_attributes > 13) state.registers.input[attribute_register_map.attribute13_register] = input.attr[13];
  85. if (num_attributes > 14) state.registers.input[attribute_register_map.attribute14_register] = input.attr[14];
  86. if (num_attributes > 15) state.registers.input[attribute_register_map.attribute15_register] = input.attr[15];
  87. state.conditional_code[0] = false;
  88. state.conditional_code[1] = false;
  89. #ifdef ARCHITECTURE_x86_64
  90. if (VideoCore::g_shader_jit_enabled)
  91. jit_shader(&state.registers);
  92. else
  93. RunInterpreter(state);
  94. #else
  95. RunInterpreter(state);
  96. #endif // ARCHITECTURE_x86_64
  97. // Setup output data
  98. OutputVertex ret;
  99. // TODO(neobrain): Under some circumstances, up to 16 attributes may be output. We need to
  100. // figure out what those circumstances are and enable the remaining outputs then.
  101. for (int i = 0; i < 7; ++i) {
  102. const auto& output_register_map = g_state.regs.vs_output_attributes[i]; // TODO: Don't hardcode VS here
  103. u32 semantics[4] = {
  104. output_register_map.map_x, output_register_map.map_y,
  105. output_register_map.map_z, output_register_map.map_w
  106. };
  107. for (int comp = 0; comp < 4; ++comp) {
  108. float24* out = ((float24*)&ret) + semantics[comp];
  109. if (semantics[comp] != Regs::VSOutputAttributes::INVALID) {
  110. *out = state.registers.output[i][comp];
  111. } else {
  112. // Zero output so that attributes which aren't output won't have denormals in them,
  113. // which would slow us down later.
  114. memset(out, 0, sizeof(*out));
  115. }
  116. }
  117. }
  118. // The hardware takes the absolute and saturates vertex colors like this, *before* doing interpolation
  119. for (int i = 0; i < 4; ++i) {
  120. ret.color[i] = float24::FromFloat32(
  121. std::fmin(std::fabs(ret.color[i].ToFloat32()), 1.0f));
  122. }
  123. LOG_TRACE(HW_GPU, "Output vertex: pos(%.2f, %.2f, %.2f, %.2f), quat(%.2f, %.2f, %.2f, %.2f), "
  124. "col(%.2f, %.2f, %.2f, %.2f), tc0(%.2f, %.2f), view(%.2f, %.2f, %.2f)",
  125. ret.pos.x.ToFloat32(), ret.pos.y.ToFloat32(), ret.pos.z.ToFloat32(), ret.pos.w.ToFloat32(),
  126. ret.quat.x.ToFloat32(), ret.quat.y.ToFloat32(), ret.quat.z.ToFloat32(), ret.quat.w.ToFloat32(),
  127. ret.color.x.ToFloat32(), ret.color.y.ToFloat32(), ret.color.z.ToFloat32(), ret.color.w.ToFloat32(),
  128. ret.tc0.u().ToFloat32(), ret.tc0.v().ToFloat32(),
  129. ret.view.x.ToFloat32(), ret.view.y.ToFloat32(), ret.view.z.ToFloat32());
  130. return ret;
  131. }
  132. DebugData<true> ProduceDebugInfo(const InputVertex& input, int num_attributes, const Regs::ShaderConfig& config, const ShaderSetup& setup) {
  133. UnitState<true> state;
  134. state.program_counter = config.main_offset;
  135. state.debug.max_offset = 0;
  136. state.debug.max_opdesc_id = 0;
  137. // Setup input register table
  138. const auto& attribute_register_map = config.input_register_map;
  139. float24 dummy_register;
  140. boost::fill(state.registers.input, &dummy_register);
  141. if (num_attributes > 0) state.registers.input[attribute_register_map.attribute0_register] = &input.attr[0].x;
  142. if (num_attributes > 1) state.registers.input[attribute_register_map.attribute1_register] = &input.attr[1].x;
  143. if (num_attributes > 2) state.registers.input[attribute_register_map.attribute2_register] = &input.attr[2].x;
  144. if (num_attributes > 3) state.registers.input[attribute_register_map.attribute3_register] = &input.attr[3].x;
  145. if (num_attributes > 4) state.registers.input[attribute_register_map.attribute4_register] = &input.attr[4].x;
  146. if (num_attributes > 5) state.registers.input[attribute_register_map.attribute5_register] = &input.attr[5].x;
  147. if (num_attributes > 6) state.registers.input[attribute_register_map.attribute6_register] = &input.attr[6].x;
  148. if (num_attributes > 7) state.registers.input[attribute_register_map.attribute7_register] = &input.attr[7].x;
  149. if (num_attributes > 8) state.registers.input[attribute_register_map.attribute8_register] = &input.attr[8].x;
  150. if (num_attributes > 9) state.registers.input[attribute_register_map.attribute9_register] = &input.attr[9].x;
  151. if (num_attributes > 10) state.registers.input[attribute_register_map.attribute10_register] = &input.attr[10].x;
  152. if (num_attributes > 11) state.registers.input[attribute_register_map.attribute11_register] = &input.attr[11].x;
  153. if (num_attributes > 12) state.registers.input[attribute_register_map.attribute12_register] = &input.attr[12].x;
  154. if (num_attributes > 13) state.registers.input[attribute_register_map.attribute13_register] = &input.attr[13].x;
  155. if (num_attributes > 14) state.registers.input[attribute_register_map.attribute14_register] = &input.attr[14].x;
  156. if (num_attributes > 15) state.registers.input[attribute_register_map.attribute15_register] = &input.attr[15].x;
  157. state.conditional_code[0] = false;
  158. state.conditional_code[1] = false;
  159. RunInterpreter(state);
  160. return state.debug;
  161. }
  162. } // namespace Shader
  163. } // namespace Pica