memory_manager.h 6.8 KB

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  1. // SPDX-FileCopyrightText: Copyright 2018 yuzu Emulator Project
  2. // SPDX-License-Identifier: GPL-2.0-or-later
  3. #pragma once
  4. #include <map>
  5. #include <optional>
  6. #include <vector>
  7. #include "common/common_types.h"
  8. namespace VideoCore {
  9. class RasterizerInterface;
  10. }
  11. namespace Core {
  12. class System;
  13. }
  14. namespace Tegra {
  15. class PageEntry final {
  16. public:
  17. enum class State : u32 {
  18. Unmapped = static_cast<u32>(-1),
  19. Allocated = static_cast<u32>(-2),
  20. };
  21. constexpr PageEntry() = default;
  22. constexpr PageEntry(State state_) : state{state_} {}
  23. constexpr PageEntry(VAddr addr) : state{static_cast<State>(addr >> ShiftBits)} {}
  24. [[nodiscard]] constexpr bool IsUnmapped() const {
  25. return state == State::Unmapped;
  26. }
  27. [[nodiscard]] constexpr bool IsAllocated() const {
  28. return state == State::Allocated;
  29. }
  30. [[nodiscard]] constexpr bool IsValid() const {
  31. return !IsUnmapped() && !IsAllocated();
  32. }
  33. [[nodiscard]] constexpr VAddr ToAddress() const {
  34. if (!IsValid()) {
  35. return {};
  36. }
  37. return static_cast<VAddr>(state) << ShiftBits;
  38. }
  39. [[nodiscard]] constexpr PageEntry operator+(u64 offset) const {
  40. // If this is a reserved value, offsets do not apply
  41. if (!IsValid()) {
  42. return *this;
  43. }
  44. return PageEntry{(static_cast<VAddr>(state) << ShiftBits) + offset};
  45. }
  46. private:
  47. static constexpr std::size_t ShiftBits{12};
  48. State state{State::Unmapped};
  49. };
  50. static_assert(sizeof(PageEntry) == 4, "PageEntry is too large");
  51. class MemoryManager final {
  52. public:
  53. explicit MemoryManager(Core::System& system_);
  54. ~MemoryManager();
  55. /// Binds a renderer to the memory manager.
  56. void BindRasterizer(VideoCore::RasterizerInterface* rasterizer);
  57. [[nodiscard]] std::optional<VAddr> GpuToCpuAddress(GPUVAddr addr) const;
  58. [[nodiscard]] std::optional<VAddr> GpuToCpuAddress(GPUVAddr addr, std::size_t size) const;
  59. template <typename T>
  60. [[nodiscard]] T Read(GPUVAddr addr) const;
  61. template <typename T>
  62. void Write(GPUVAddr addr, T data);
  63. [[nodiscard]] u8* GetPointer(GPUVAddr addr);
  64. [[nodiscard]] const u8* GetPointer(GPUVAddr addr) const;
  65. /// Returns the number of bytes until the end of the memory map containing the given GPU address
  66. [[nodiscard]] size_t BytesToMapEnd(GPUVAddr gpu_addr) const noexcept;
  67. /**
  68. * ReadBlock and WriteBlock are full read and write operations over virtual
  69. * GPU Memory. It's important to use these when GPU memory may not be continuous
  70. * in the Host Memory counterpart. Note: This functions cause Host GPU Memory
  71. * Flushes and Invalidations, respectively to each operation.
  72. */
  73. void ReadBlock(GPUVAddr gpu_src_addr, void* dest_buffer, std::size_t size) const;
  74. void WriteBlock(GPUVAddr gpu_dest_addr, const void* src_buffer, std::size_t size);
  75. void CopyBlock(GPUVAddr gpu_dest_addr, GPUVAddr gpu_src_addr, std::size_t size);
  76. /**
  77. * ReadBlockUnsafe and WriteBlockUnsafe are special versions of ReadBlock and
  78. * WriteBlock respectively. In this versions, no flushing or invalidation is actually
  79. * done and their performance is similar to a memcpy. This functions can be used
  80. * on either of this 2 scenarios instead of their safe counterpart:
  81. * - Memory which is sure to never be represented in the Host GPU.
  82. * - Memory Managed by a Cache Manager. Example: Texture Flushing should use
  83. * WriteBlockUnsafe instead of WriteBlock since it shouldn't invalidate the texture
  84. * being flushed.
  85. */
  86. void ReadBlockUnsafe(GPUVAddr gpu_src_addr, void* dest_buffer, std::size_t size) const;
  87. void WriteBlockUnsafe(GPUVAddr gpu_dest_addr, const void* src_buffer, std::size_t size);
  88. /**
  89. * Checks if a gpu region can be simply read with a pointer.
  90. */
  91. [[nodiscard]] bool IsGranularRange(GPUVAddr gpu_addr, std::size_t size) const;
  92. /**
  93. * Checks if a gpu region is mapped by a single range of cpu addresses.
  94. */
  95. [[nodiscard]] bool IsContinousRange(GPUVAddr gpu_addr, std::size_t size) const;
  96. /**
  97. * Checks if a gpu region is mapped entirely.
  98. */
  99. [[nodiscard]] bool IsFullyMappedRange(GPUVAddr gpu_addr, std::size_t size) const;
  100. /**
  101. * Returns a vector with all the subranges of cpu addresses mapped beneath.
  102. * if the region is continous, a single pair will be returned. If it's unmapped, an empty vector
  103. * will be returned;
  104. */
  105. std::vector<std::pair<GPUVAddr, std::size_t>> GetSubmappedRange(GPUVAddr gpu_addr,
  106. std::size_t size) const;
  107. [[nodiscard]] GPUVAddr Map(VAddr cpu_addr, GPUVAddr gpu_addr, std::size_t size);
  108. [[nodiscard]] GPUVAddr MapAllocate(VAddr cpu_addr, std::size_t size, std::size_t align);
  109. [[nodiscard]] GPUVAddr MapAllocate32(VAddr cpu_addr, std::size_t size);
  110. [[nodiscard]] std::optional<GPUVAddr> AllocateFixed(GPUVAddr gpu_addr, std::size_t size);
  111. [[nodiscard]] GPUVAddr Allocate(std::size_t size, std::size_t align);
  112. void Unmap(GPUVAddr gpu_addr, std::size_t size);
  113. void FlushRegion(GPUVAddr gpu_addr, size_t size) const;
  114. private:
  115. [[nodiscard]] PageEntry GetPageEntry(GPUVAddr gpu_addr) const;
  116. void SetPageEntry(GPUVAddr gpu_addr, PageEntry page_entry, std::size_t size = page_size);
  117. GPUVAddr UpdateRange(GPUVAddr gpu_addr, PageEntry page_entry, std::size_t size);
  118. [[nodiscard]] std::optional<GPUVAddr> FindFreeRange(std::size_t size, std::size_t align,
  119. bool start_32bit_address = false) const;
  120. void TryLockPage(PageEntry page_entry, std::size_t size);
  121. void TryUnlockPage(PageEntry page_entry, std::size_t size);
  122. void ReadBlockImpl(GPUVAddr gpu_src_addr, void* dest_buffer, std::size_t size,
  123. bool is_safe) const;
  124. void WriteBlockImpl(GPUVAddr gpu_dest_addr, const void* src_buffer, std::size_t size,
  125. bool is_safe);
  126. [[nodiscard]] static constexpr std::size_t PageEntryIndex(GPUVAddr gpu_addr) {
  127. return (gpu_addr >> page_bits) & page_table_mask;
  128. }
  129. static constexpr u64 address_space_size = 1ULL << 40;
  130. static constexpr u64 address_space_start = 1ULL << 32;
  131. static constexpr u64 address_space_start_low = 1ULL << 16;
  132. static constexpr u64 page_bits{16};
  133. static constexpr u64 page_size{1 << page_bits};
  134. static constexpr u64 page_mask{page_size - 1};
  135. static constexpr u64 page_table_bits{24};
  136. static constexpr u64 page_table_size{1 << page_table_bits};
  137. static constexpr u64 page_table_mask{page_table_size - 1};
  138. Core::System& system;
  139. VideoCore::RasterizerInterface* rasterizer = nullptr;
  140. std::vector<PageEntry> page_table;
  141. using MapRange = std::pair<GPUVAddr, size_t>;
  142. std::vector<MapRange> map_ranges;
  143. std::vector<std::pair<VAddr, std::size_t>> cache_invalidate_queue;
  144. };
  145. } // namespace Tegra