collect_shader_info_pass.cpp 33 KB

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  1. // Copyright 2021 yuzu Emulator Project
  2. // Licensed under GPLv2 or any later version
  3. // Refer to the license.txt file included.
  4. #include "shader_recompiler/environment.h"
  5. #include "shader_recompiler/frontend/ir/modifiers.h"
  6. #include "shader_recompiler/frontend/ir/program.h"
  7. #include "shader_recompiler/frontend/ir/value.h"
  8. #include "shader_recompiler/ir_opt/passes.h"
  9. #include "shader_recompiler/shader_info.h"
  10. namespace Shader::Optimization {
  11. namespace {
  12. void AddConstantBufferDescriptor(Info& info, u32 index, u32 count) {
  13. if (count != 1) {
  14. throw NotImplementedException("Constant buffer descriptor indexing");
  15. }
  16. if ((info.constant_buffer_mask & (1U << index)) != 0) {
  17. return;
  18. }
  19. info.constant_buffer_mask |= 1U << index;
  20. auto& cbufs{info.constant_buffer_descriptors};
  21. cbufs.insert(std::ranges::lower_bound(cbufs, index, {}, &ConstantBufferDescriptor::index),
  22. ConstantBufferDescriptor{
  23. .index = index,
  24. .count = 1,
  25. });
  26. }
  27. void GetAttribute(Info& info, IR::Attribute attr) {
  28. if (IR::IsGeneric(attr)) {
  29. info.input_generics.at(IR::GenericAttributeIndex(attr)).used = true;
  30. return;
  31. }
  32. if (attr >= IR::Attribute::FixedFncTexture0S && attr <= IR::Attribute::FixedFncTexture9Q) {
  33. info.loads_fixed_fnc_textures = true;
  34. return;
  35. }
  36. switch (attr) {
  37. case IR::Attribute::PrimitiveId:
  38. info.loads_primitive_id = true;
  39. break;
  40. case IR::Attribute::PositionX:
  41. case IR::Attribute::PositionY:
  42. case IR::Attribute::PositionZ:
  43. case IR::Attribute::PositionW:
  44. info.loads_position = true;
  45. break;
  46. case IR::Attribute::ColorFrontDiffuseR:
  47. case IR::Attribute::ColorFrontDiffuseG:
  48. case IR::Attribute::ColorFrontDiffuseB:
  49. case IR::Attribute::ColorFrontDiffuseA:
  50. info.loads_color_front_diffuse = true;
  51. break;
  52. case IR::Attribute::PointSpriteS:
  53. case IR::Attribute::PointSpriteT:
  54. info.loads_point_coord = true;
  55. break;
  56. case IR::Attribute::TessellationEvaluationPointU:
  57. case IR::Attribute::TessellationEvaluationPointV:
  58. info.loads_tess_coord = true;
  59. break;
  60. case IR::Attribute::InstanceId:
  61. info.loads_instance_id = true;
  62. break;
  63. case IR::Attribute::VertexId:
  64. info.loads_vertex_id = true;
  65. break;
  66. case IR::Attribute::FrontFace:
  67. info.loads_front_face = true;
  68. break;
  69. default:
  70. throw NotImplementedException("Get attribute {}", attr);
  71. }
  72. }
  73. void SetAttribute(Info& info, IR::Attribute attr) {
  74. if (IR::IsGeneric(attr)) {
  75. info.stores_generics.at(IR::GenericAttributeIndex(attr)) = true;
  76. return;
  77. }
  78. if (attr >= IR::Attribute::FixedFncTexture0S && attr <= IR::Attribute::FixedFncTexture9Q) {
  79. info.stores_fixed_fnc_textures = true;
  80. return;
  81. }
  82. switch (attr) {
  83. case IR::Attribute::Layer:
  84. info.stores_layer = true;
  85. break;
  86. case IR::Attribute::ViewportIndex:
  87. info.stores_viewport_index = true;
  88. break;
  89. case IR::Attribute::PointSize:
  90. info.stores_point_size = true;
  91. break;
  92. case IR::Attribute::PositionX:
  93. case IR::Attribute::PositionY:
  94. case IR::Attribute::PositionZ:
  95. case IR::Attribute::PositionW:
  96. info.stores_position = true;
  97. break;
  98. case IR::Attribute::ColorFrontDiffuseR:
  99. case IR::Attribute::ColorFrontDiffuseG:
  100. case IR::Attribute::ColorFrontDiffuseB:
  101. case IR::Attribute::ColorFrontDiffuseA:
  102. info.stores_color_front_diffuse = true;
  103. break;
  104. case IR::Attribute::ColorFrontSpecularR:
  105. case IR::Attribute::ColorFrontSpecularG:
  106. case IR::Attribute::ColorFrontSpecularB:
  107. case IR::Attribute::ColorFrontSpecularA:
  108. info.stores_color_front_specular = true;
  109. break;
  110. case IR::Attribute::ColorBackDiffuseR:
  111. case IR::Attribute::ColorBackDiffuseG:
  112. case IR::Attribute::ColorBackDiffuseB:
  113. case IR::Attribute::ColorBackDiffuseA:
  114. info.stores_color_back_diffuse = true;
  115. break;
  116. case IR::Attribute::ColorBackSpecularR:
  117. case IR::Attribute::ColorBackSpecularG:
  118. case IR::Attribute::ColorBackSpecularB:
  119. case IR::Attribute::ColorBackSpecularA:
  120. info.stores_color_front_specular = true;
  121. break;
  122. case IR::Attribute::ClipDistance0:
  123. case IR::Attribute::ClipDistance1:
  124. case IR::Attribute::ClipDistance2:
  125. case IR::Attribute::ClipDistance3:
  126. case IR::Attribute::ClipDistance4:
  127. case IR::Attribute::ClipDistance5:
  128. case IR::Attribute::ClipDistance6:
  129. case IR::Attribute::ClipDistance7:
  130. info.stores_clip_distance = true;
  131. break;
  132. case IR::Attribute::FogCoordinate:
  133. info.stores_fog_coordinate = true;
  134. break;
  135. case IR::Attribute::ViewportMask:
  136. info.stores_viewport_mask = true;
  137. break;
  138. default:
  139. throw NotImplementedException("Set attribute {}", attr);
  140. }
  141. }
  142. void GetPatch(Info& info, IR::Patch patch) {
  143. if (!IR::IsGeneric(patch)) {
  144. throw NotImplementedException("Reading non-generic patch {}", patch);
  145. }
  146. info.uses_patches.at(IR::GenericPatchIndex(patch)) = true;
  147. }
  148. void SetPatch(Info& info, IR::Patch patch) {
  149. if (IR::IsGeneric(patch)) {
  150. info.uses_patches.at(IR::GenericPatchIndex(patch)) = true;
  151. return;
  152. }
  153. switch (patch) {
  154. case IR::Patch::TessellationLodLeft:
  155. case IR::Patch::TessellationLodTop:
  156. case IR::Patch::TessellationLodRight:
  157. case IR::Patch::TessellationLodBottom:
  158. info.stores_tess_level_outer = true;
  159. break;
  160. case IR::Patch::TessellationLodInteriorU:
  161. case IR::Patch::TessellationLodInteriorV:
  162. info.stores_tess_level_inner = true;
  163. break;
  164. default:
  165. throw NotImplementedException("Set patch {}", patch);
  166. }
  167. }
  168. void CheckCBufNVN(Info& info, IR::Inst& inst) {
  169. const IR::Value cbuf_index{inst.Arg(0)};
  170. if (!cbuf_index.IsImmediate()) {
  171. info.nvn_buffer_used.set();
  172. return;
  173. }
  174. const u32 index{cbuf_index.U32()};
  175. if (index != 0) {
  176. return;
  177. }
  178. const IR::Value cbuf_offset{inst.Arg(1)};
  179. if (!cbuf_offset.IsImmediate()) {
  180. info.nvn_buffer_used.set();
  181. return;
  182. }
  183. const u32 offset{cbuf_offset.U32()};
  184. const u32 descriptor_size{0x10};
  185. const u32 upper_limit{info.nvn_buffer_base + descriptor_size * 16};
  186. if (offset >= info.nvn_buffer_base && offset < upper_limit) {
  187. const std::size_t nvn_index{(offset - info.nvn_buffer_base) / descriptor_size};
  188. info.nvn_buffer_used.set(nvn_index, true);
  189. }
  190. }
  191. void VisitUsages(Info& info, IR::Inst& inst) {
  192. switch (inst.GetOpcode()) {
  193. case IR::Opcode::CompositeConstructF16x2:
  194. case IR::Opcode::CompositeConstructF16x3:
  195. case IR::Opcode::CompositeConstructF16x4:
  196. case IR::Opcode::CompositeExtractF16x2:
  197. case IR::Opcode::CompositeExtractF16x3:
  198. case IR::Opcode::CompositeExtractF16x4:
  199. case IR::Opcode::CompositeInsertF16x2:
  200. case IR::Opcode::CompositeInsertF16x3:
  201. case IR::Opcode::CompositeInsertF16x4:
  202. case IR::Opcode::SelectF16:
  203. case IR::Opcode::BitCastU16F16:
  204. case IR::Opcode::BitCastF16U16:
  205. case IR::Opcode::PackFloat2x16:
  206. case IR::Opcode::UnpackFloat2x16:
  207. case IR::Opcode::ConvertS16F16:
  208. case IR::Opcode::ConvertS32F16:
  209. case IR::Opcode::ConvertS64F16:
  210. case IR::Opcode::ConvertU16F16:
  211. case IR::Opcode::ConvertU32F16:
  212. case IR::Opcode::ConvertU64F16:
  213. case IR::Opcode::ConvertF16S8:
  214. case IR::Opcode::ConvertF16S16:
  215. case IR::Opcode::ConvertF16S32:
  216. case IR::Opcode::ConvertF16S64:
  217. case IR::Opcode::ConvertF16U8:
  218. case IR::Opcode::ConvertF16U16:
  219. case IR::Opcode::ConvertF16U32:
  220. case IR::Opcode::ConvertF16U64:
  221. case IR::Opcode::FPAbs16:
  222. case IR::Opcode::FPAdd16:
  223. case IR::Opcode::FPCeil16:
  224. case IR::Opcode::FPFloor16:
  225. case IR::Opcode::FPFma16:
  226. case IR::Opcode::FPMul16:
  227. case IR::Opcode::FPNeg16:
  228. case IR::Opcode::FPRoundEven16:
  229. case IR::Opcode::FPSaturate16:
  230. case IR::Opcode::FPClamp16:
  231. case IR::Opcode::FPTrunc16:
  232. case IR::Opcode::FPOrdEqual16:
  233. case IR::Opcode::FPUnordEqual16:
  234. case IR::Opcode::FPOrdNotEqual16:
  235. case IR::Opcode::FPUnordNotEqual16:
  236. case IR::Opcode::FPOrdLessThan16:
  237. case IR::Opcode::FPUnordLessThan16:
  238. case IR::Opcode::FPOrdGreaterThan16:
  239. case IR::Opcode::FPUnordGreaterThan16:
  240. case IR::Opcode::FPOrdLessThanEqual16:
  241. case IR::Opcode::FPUnordLessThanEqual16:
  242. case IR::Opcode::FPOrdGreaterThanEqual16:
  243. case IR::Opcode::FPUnordGreaterThanEqual16:
  244. case IR::Opcode::FPIsNan16:
  245. case IR::Opcode::GlobalAtomicAddF16x2:
  246. case IR::Opcode::GlobalAtomicMinF16x2:
  247. case IR::Opcode::GlobalAtomicMaxF16x2:
  248. case IR::Opcode::StorageAtomicAddF16x2:
  249. case IR::Opcode::StorageAtomicMinF16x2:
  250. case IR::Opcode::StorageAtomicMaxF16x2:
  251. info.uses_fp16 = true;
  252. break;
  253. case IR::Opcode::CompositeConstructF64x2:
  254. case IR::Opcode::CompositeConstructF64x3:
  255. case IR::Opcode::CompositeConstructF64x4:
  256. case IR::Opcode::CompositeExtractF64x2:
  257. case IR::Opcode::CompositeExtractF64x3:
  258. case IR::Opcode::CompositeExtractF64x4:
  259. case IR::Opcode::CompositeInsertF64x2:
  260. case IR::Opcode::CompositeInsertF64x3:
  261. case IR::Opcode::CompositeInsertF64x4:
  262. case IR::Opcode::SelectF64:
  263. case IR::Opcode::BitCastU64F64:
  264. case IR::Opcode::BitCastF64U64:
  265. case IR::Opcode::PackDouble2x32:
  266. case IR::Opcode::UnpackDouble2x32:
  267. case IR::Opcode::FPAbs64:
  268. case IR::Opcode::FPAdd64:
  269. case IR::Opcode::FPCeil64:
  270. case IR::Opcode::FPFloor64:
  271. case IR::Opcode::FPFma64:
  272. case IR::Opcode::FPMax64:
  273. case IR::Opcode::FPMin64:
  274. case IR::Opcode::FPMul64:
  275. case IR::Opcode::FPNeg64:
  276. case IR::Opcode::FPRecip64:
  277. case IR::Opcode::FPRecipSqrt64:
  278. case IR::Opcode::FPRoundEven64:
  279. case IR::Opcode::FPSaturate64:
  280. case IR::Opcode::FPClamp64:
  281. case IR::Opcode::FPTrunc64:
  282. case IR::Opcode::FPOrdEqual64:
  283. case IR::Opcode::FPUnordEqual64:
  284. case IR::Opcode::FPOrdNotEqual64:
  285. case IR::Opcode::FPUnordNotEqual64:
  286. case IR::Opcode::FPOrdLessThan64:
  287. case IR::Opcode::FPUnordLessThan64:
  288. case IR::Opcode::FPOrdGreaterThan64:
  289. case IR::Opcode::FPUnordGreaterThan64:
  290. case IR::Opcode::FPOrdLessThanEqual64:
  291. case IR::Opcode::FPUnordLessThanEqual64:
  292. case IR::Opcode::FPOrdGreaterThanEqual64:
  293. case IR::Opcode::FPUnordGreaterThanEqual64:
  294. case IR::Opcode::FPIsNan64:
  295. case IR::Opcode::ConvertS16F64:
  296. case IR::Opcode::ConvertS32F64:
  297. case IR::Opcode::ConvertS64F64:
  298. case IR::Opcode::ConvertU16F64:
  299. case IR::Opcode::ConvertU32F64:
  300. case IR::Opcode::ConvertU64F64:
  301. case IR::Opcode::ConvertF32F64:
  302. case IR::Opcode::ConvertF64F32:
  303. case IR::Opcode::ConvertF64S8:
  304. case IR::Opcode::ConvertF64S16:
  305. case IR::Opcode::ConvertF64S32:
  306. case IR::Opcode::ConvertF64S64:
  307. case IR::Opcode::ConvertF64U8:
  308. case IR::Opcode::ConvertF64U16:
  309. case IR::Opcode::ConvertF64U32:
  310. case IR::Opcode::ConvertF64U64:
  311. info.uses_fp64 = true;
  312. break;
  313. default:
  314. break;
  315. }
  316. switch (inst.GetOpcode()) {
  317. case IR::Opcode::GetCbufU8:
  318. case IR::Opcode::GetCbufS8:
  319. case IR::Opcode::UndefU8:
  320. case IR::Opcode::LoadGlobalU8:
  321. case IR::Opcode::LoadGlobalS8:
  322. case IR::Opcode::WriteGlobalU8:
  323. case IR::Opcode::WriteGlobalS8:
  324. case IR::Opcode::LoadStorageU8:
  325. case IR::Opcode::LoadStorageS8:
  326. case IR::Opcode::WriteStorageU8:
  327. case IR::Opcode::WriteStorageS8:
  328. case IR::Opcode::LoadSharedU8:
  329. case IR::Opcode::LoadSharedS8:
  330. case IR::Opcode::WriteSharedU8:
  331. case IR::Opcode::SelectU8:
  332. case IR::Opcode::ConvertF16S8:
  333. case IR::Opcode::ConvertF16U8:
  334. case IR::Opcode::ConvertF32S8:
  335. case IR::Opcode::ConvertF32U8:
  336. case IR::Opcode::ConvertF64S8:
  337. case IR::Opcode::ConvertF64U8:
  338. info.uses_int8 = true;
  339. break;
  340. default:
  341. break;
  342. }
  343. switch (inst.GetOpcode()) {
  344. case IR::Opcode::GetCbufU16:
  345. case IR::Opcode::GetCbufS16:
  346. case IR::Opcode::UndefU16:
  347. case IR::Opcode::LoadGlobalU16:
  348. case IR::Opcode::LoadGlobalS16:
  349. case IR::Opcode::WriteGlobalU16:
  350. case IR::Opcode::WriteGlobalS16:
  351. case IR::Opcode::LoadStorageU16:
  352. case IR::Opcode::LoadStorageS16:
  353. case IR::Opcode::WriteStorageU16:
  354. case IR::Opcode::WriteStorageS16:
  355. case IR::Opcode::LoadSharedU16:
  356. case IR::Opcode::LoadSharedS16:
  357. case IR::Opcode::WriteSharedU16:
  358. case IR::Opcode::SelectU16:
  359. case IR::Opcode::BitCastU16F16:
  360. case IR::Opcode::BitCastF16U16:
  361. case IR::Opcode::ConvertS16F16:
  362. case IR::Opcode::ConvertS16F32:
  363. case IR::Opcode::ConvertS16F64:
  364. case IR::Opcode::ConvertU16F16:
  365. case IR::Opcode::ConvertU16F32:
  366. case IR::Opcode::ConvertU16F64:
  367. case IR::Opcode::ConvertF16S16:
  368. case IR::Opcode::ConvertF16U16:
  369. case IR::Opcode::ConvertF32S16:
  370. case IR::Opcode::ConvertF32U16:
  371. case IR::Opcode::ConvertF64S16:
  372. case IR::Opcode::ConvertF64U16:
  373. info.uses_int16 = true;
  374. break;
  375. default:
  376. break;
  377. }
  378. switch (inst.GetOpcode()) {
  379. case IR::Opcode::UndefU64:
  380. case IR::Opcode::LoadGlobalU8:
  381. case IR::Opcode::LoadGlobalS8:
  382. case IR::Opcode::LoadGlobalU16:
  383. case IR::Opcode::LoadGlobalS16:
  384. case IR::Opcode::LoadGlobal32:
  385. case IR::Opcode::LoadGlobal64:
  386. case IR::Opcode::LoadGlobal128:
  387. case IR::Opcode::WriteGlobalU8:
  388. case IR::Opcode::WriteGlobalS8:
  389. case IR::Opcode::WriteGlobalU16:
  390. case IR::Opcode::WriteGlobalS16:
  391. case IR::Opcode::WriteGlobal32:
  392. case IR::Opcode::WriteGlobal64:
  393. case IR::Opcode::WriteGlobal128:
  394. case IR::Opcode::SelectU64:
  395. case IR::Opcode::BitCastU64F64:
  396. case IR::Opcode::BitCastF64U64:
  397. case IR::Opcode::PackUint2x32:
  398. case IR::Opcode::UnpackUint2x32:
  399. case IR::Opcode::IAdd64:
  400. case IR::Opcode::ISub64:
  401. case IR::Opcode::INeg64:
  402. case IR::Opcode::ShiftLeftLogical64:
  403. case IR::Opcode::ShiftRightLogical64:
  404. case IR::Opcode::ShiftRightArithmetic64:
  405. case IR::Opcode::ConvertS64F16:
  406. case IR::Opcode::ConvertS64F32:
  407. case IR::Opcode::ConvertS64F64:
  408. case IR::Opcode::ConvertU64F16:
  409. case IR::Opcode::ConvertU64F32:
  410. case IR::Opcode::ConvertU64F64:
  411. case IR::Opcode::ConvertU64U32:
  412. case IR::Opcode::ConvertU32U64:
  413. case IR::Opcode::ConvertF16U64:
  414. case IR::Opcode::ConvertF32U64:
  415. case IR::Opcode::ConvertF64U64:
  416. case IR::Opcode::SharedAtomicExchange64:
  417. case IR::Opcode::GlobalAtomicIAdd64:
  418. case IR::Opcode::GlobalAtomicSMin64:
  419. case IR::Opcode::GlobalAtomicUMin64:
  420. case IR::Opcode::GlobalAtomicSMax64:
  421. case IR::Opcode::GlobalAtomicUMax64:
  422. case IR::Opcode::GlobalAtomicAnd64:
  423. case IR::Opcode::GlobalAtomicOr64:
  424. case IR::Opcode::GlobalAtomicXor64:
  425. case IR::Opcode::GlobalAtomicExchange64:
  426. case IR::Opcode::StorageAtomicIAdd64:
  427. case IR::Opcode::StorageAtomicSMin64:
  428. case IR::Opcode::StorageAtomicUMin64:
  429. case IR::Opcode::StorageAtomicSMax64:
  430. case IR::Opcode::StorageAtomicUMax64:
  431. case IR::Opcode::StorageAtomicAnd64:
  432. case IR::Opcode::StorageAtomicOr64:
  433. case IR::Opcode::StorageAtomicXor64:
  434. case IR::Opcode::StorageAtomicExchange64:
  435. info.uses_int64 = true;
  436. break;
  437. default:
  438. break;
  439. }
  440. switch (inst.GetOpcode()) {
  441. case IR::Opcode::WriteGlobalU8:
  442. case IR::Opcode::WriteGlobalS8:
  443. case IR::Opcode::WriteGlobalU16:
  444. case IR::Opcode::WriteGlobalS16:
  445. case IR::Opcode::WriteGlobal32:
  446. case IR::Opcode::WriteGlobal64:
  447. case IR::Opcode::WriteGlobal128:
  448. case IR::Opcode::GlobalAtomicIAdd32:
  449. case IR::Opcode::GlobalAtomicSMin32:
  450. case IR::Opcode::GlobalAtomicUMin32:
  451. case IR::Opcode::GlobalAtomicSMax32:
  452. case IR::Opcode::GlobalAtomicUMax32:
  453. case IR::Opcode::GlobalAtomicInc32:
  454. case IR::Opcode::GlobalAtomicDec32:
  455. case IR::Opcode::GlobalAtomicAnd32:
  456. case IR::Opcode::GlobalAtomicOr32:
  457. case IR::Opcode::GlobalAtomicXor32:
  458. case IR::Opcode::GlobalAtomicExchange32:
  459. case IR::Opcode::GlobalAtomicIAdd64:
  460. case IR::Opcode::GlobalAtomicSMin64:
  461. case IR::Opcode::GlobalAtomicUMin64:
  462. case IR::Opcode::GlobalAtomicSMax64:
  463. case IR::Opcode::GlobalAtomicUMax64:
  464. case IR::Opcode::GlobalAtomicAnd64:
  465. case IR::Opcode::GlobalAtomicOr64:
  466. case IR::Opcode::GlobalAtomicXor64:
  467. case IR::Opcode::GlobalAtomicExchange64:
  468. case IR::Opcode::GlobalAtomicAddF32:
  469. case IR::Opcode::GlobalAtomicAddF16x2:
  470. case IR::Opcode::GlobalAtomicAddF32x2:
  471. case IR::Opcode::GlobalAtomicMinF16x2:
  472. case IR::Opcode::GlobalAtomicMinF32x2:
  473. case IR::Opcode::GlobalAtomicMaxF16x2:
  474. case IR::Opcode::GlobalAtomicMaxF32x2:
  475. info.stores_global_memory = true;
  476. [[fallthrough]];
  477. case IR::Opcode::LoadGlobalU8:
  478. case IR::Opcode::LoadGlobalS8:
  479. case IR::Opcode::LoadGlobalU16:
  480. case IR::Opcode::LoadGlobalS16:
  481. case IR::Opcode::LoadGlobal32:
  482. case IR::Opcode::LoadGlobal64:
  483. case IR::Opcode::LoadGlobal128:
  484. info.uses_int64 = true;
  485. info.uses_global_memory = true;
  486. info.used_constant_buffer_types |= IR::Type::U32 | IR::Type::U32x2;
  487. info.used_storage_buffer_types |= IR::Type::U32 | IR::Type::U32x2 | IR::Type::U32x4;
  488. break;
  489. default:
  490. break;
  491. }
  492. switch (inst.GetOpcode()) {
  493. case IR::Opcode::DemoteToHelperInvocation:
  494. info.uses_demote_to_helper_invocation = true;
  495. break;
  496. case IR::Opcode::GetAttribute:
  497. GetAttribute(info, inst.Arg(0).Attribute());
  498. break;
  499. case IR::Opcode::SetAttribute:
  500. SetAttribute(info, inst.Arg(0).Attribute());
  501. break;
  502. case IR::Opcode::GetPatch:
  503. GetPatch(info, inst.Arg(0).Patch());
  504. break;
  505. case IR::Opcode::SetPatch:
  506. SetPatch(info, inst.Arg(0).Patch());
  507. break;
  508. case IR::Opcode::GetAttributeIndexed:
  509. info.loads_indexed_attributes = true;
  510. break;
  511. case IR::Opcode::SetAttributeIndexed:
  512. info.stores_indexed_attributes = true;
  513. break;
  514. case IR::Opcode::SetFragColor:
  515. info.stores_frag_color[inst.Arg(0).U32()] = true;
  516. break;
  517. case IR::Opcode::SetSampleMask:
  518. info.stores_sample_mask = true;
  519. break;
  520. case IR::Opcode::SetFragDepth:
  521. info.stores_frag_depth = true;
  522. break;
  523. case IR::Opcode::WorkgroupId:
  524. info.uses_workgroup_id = true;
  525. break;
  526. case IR::Opcode::LocalInvocationId:
  527. info.uses_local_invocation_id = true;
  528. break;
  529. case IR::Opcode::InvocationId:
  530. info.uses_invocation_id = true;
  531. break;
  532. case IR::Opcode::SampleId:
  533. info.uses_sample_id = true;
  534. break;
  535. case IR::Opcode::IsHelperInvocation:
  536. info.uses_is_helper_invocation = true;
  537. break;
  538. case IR::Opcode::LaneId:
  539. info.uses_subgroup_invocation_id = true;
  540. break;
  541. case IR::Opcode::ShuffleIndex:
  542. case IR::Opcode::ShuffleUp:
  543. case IR::Opcode::ShuffleDown:
  544. case IR::Opcode::ShuffleButterfly:
  545. info.uses_subgroup_shuffles = true;
  546. break;
  547. case IR::Opcode::GetCbufU8:
  548. case IR::Opcode::GetCbufS8:
  549. case IR::Opcode::GetCbufU16:
  550. case IR::Opcode::GetCbufS16:
  551. case IR::Opcode::GetCbufU32:
  552. case IR::Opcode::GetCbufF32:
  553. case IR::Opcode::GetCbufU32x2: {
  554. const IR::Value index{inst.Arg(0)};
  555. const IR::Value offset{inst.Arg(1)};
  556. if (!index.IsImmediate()) {
  557. throw NotImplementedException("Constant buffer with non-immediate index");
  558. }
  559. AddConstantBufferDescriptor(info, index.U32(), 1);
  560. u32 element_size{};
  561. switch (inst.GetOpcode()) {
  562. case IR::Opcode::GetCbufU8:
  563. case IR::Opcode::GetCbufS8:
  564. info.used_constant_buffer_types |= IR::Type::U8;
  565. element_size = 1;
  566. break;
  567. case IR::Opcode::GetCbufU16:
  568. case IR::Opcode::GetCbufS16:
  569. info.used_constant_buffer_types |= IR::Type::U16;
  570. element_size = 2;
  571. break;
  572. case IR::Opcode::GetCbufU32:
  573. info.used_constant_buffer_types |= IR::Type::U32;
  574. element_size = 4;
  575. break;
  576. case IR::Opcode::GetCbufF32:
  577. info.used_constant_buffer_types |= IR::Type::F32;
  578. element_size = 4;
  579. break;
  580. case IR::Opcode::GetCbufU32x2:
  581. info.used_constant_buffer_types |= IR::Type::U32x2;
  582. element_size = 8;
  583. break;
  584. default:
  585. break;
  586. }
  587. u32& size{info.constant_buffer_used_sizes[index.U32()]};
  588. if (offset.IsImmediate()) {
  589. size = std::max(size, offset.U32() + element_size);
  590. } else {
  591. size = 0x10'000;
  592. }
  593. break;
  594. }
  595. case IR::Opcode::BindlessImageSampleImplicitLod:
  596. case IR::Opcode::BindlessImageSampleExplicitLod:
  597. case IR::Opcode::BindlessImageSampleDrefImplicitLod:
  598. case IR::Opcode::BindlessImageSampleDrefExplicitLod:
  599. case IR::Opcode::BindlessImageGather:
  600. case IR::Opcode::BindlessImageGatherDref:
  601. case IR::Opcode::BindlessImageFetch:
  602. case IR::Opcode::BindlessImageQueryDimensions:
  603. case IR::Opcode::BindlessImageQueryLod:
  604. case IR::Opcode::BindlessImageGradient:
  605. case IR::Opcode::BoundImageSampleImplicitLod:
  606. case IR::Opcode::BoundImageSampleExplicitLod:
  607. case IR::Opcode::BoundImageSampleDrefImplicitLod:
  608. case IR::Opcode::BoundImageSampleDrefExplicitLod:
  609. case IR::Opcode::BoundImageGather:
  610. case IR::Opcode::BoundImageGatherDref:
  611. case IR::Opcode::BoundImageFetch:
  612. case IR::Opcode::BoundImageQueryDimensions:
  613. case IR::Opcode::BoundImageQueryLod:
  614. case IR::Opcode::BoundImageGradient:
  615. case IR::Opcode::ImageSampleImplicitLod:
  616. case IR::Opcode::ImageSampleExplicitLod:
  617. case IR::Opcode::ImageSampleDrefImplicitLod:
  618. case IR::Opcode::ImageSampleDrefExplicitLod:
  619. case IR::Opcode::ImageGather:
  620. case IR::Opcode::ImageGatherDref:
  621. case IR::Opcode::ImageFetch:
  622. case IR::Opcode::ImageQueryDimensions:
  623. case IR::Opcode::ImageQueryLod:
  624. case IR::Opcode::ImageGradient: {
  625. const TextureType type{inst.Flags<IR::TextureInstInfo>().type};
  626. info.uses_sampled_1d |= type == TextureType::Color1D || type == TextureType::ColorArray1D;
  627. info.uses_sparse_residency |=
  628. inst.GetAssociatedPseudoOperation(IR::Opcode::GetSparseFromOp) != nullptr;
  629. break;
  630. }
  631. case IR::Opcode::ImageRead: {
  632. const auto flags{inst.Flags<IR::TextureInstInfo>()};
  633. info.uses_typeless_image_reads |= flags.image_format == ImageFormat::Typeless;
  634. info.uses_sparse_residency |=
  635. inst.GetAssociatedPseudoOperation(IR::Opcode::GetSparseFromOp) != nullptr;
  636. break;
  637. }
  638. case IR::Opcode::ImageWrite: {
  639. const auto flags{inst.Flags<IR::TextureInstInfo>()};
  640. info.uses_typeless_image_writes |= flags.image_format == ImageFormat::Typeless;
  641. info.uses_image_buffers |= flags.type == TextureType::Buffer;
  642. break;
  643. }
  644. case IR::Opcode::SubgroupEqMask:
  645. case IR::Opcode::SubgroupLtMask:
  646. case IR::Opcode::SubgroupLeMask:
  647. case IR::Opcode::SubgroupGtMask:
  648. case IR::Opcode::SubgroupGeMask:
  649. info.uses_subgroup_mask = true;
  650. break;
  651. case IR::Opcode::VoteAll:
  652. case IR::Opcode::VoteAny:
  653. case IR::Opcode::VoteEqual:
  654. case IR::Opcode::SubgroupBallot:
  655. info.uses_subgroup_vote = true;
  656. break;
  657. case IR::Opcode::FSwizzleAdd:
  658. info.uses_fswzadd = true;
  659. break;
  660. case IR::Opcode::DPdxFine:
  661. case IR::Opcode::DPdyFine:
  662. case IR::Opcode::DPdxCoarse:
  663. case IR::Opcode::DPdyCoarse:
  664. info.uses_derivatives = true;
  665. break;
  666. case IR::Opcode::LoadStorageU8:
  667. case IR::Opcode::LoadStorageS8:
  668. case IR::Opcode::WriteStorageU8:
  669. case IR::Opcode::WriteStorageS8:
  670. info.used_storage_buffer_types |= IR::Type::U8;
  671. break;
  672. case IR::Opcode::LoadStorageU16:
  673. case IR::Opcode::LoadStorageS16:
  674. case IR::Opcode::WriteStorageU16:
  675. case IR::Opcode::WriteStorageS16:
  676. info.used_storage_buffer_types |= IR::Type::U16;
  677. break;
  678. case IR::Opcode::LoadStorage32:
  679. case IR::Opcode::WriteStorage32:
  680. case IR::Opcode::StorageAtomicIAdd32:
  681. case IR::Opcode::StorageAtomicSMin32:
  682. case IR::Opcode::StorageAtomicUMin32:
  683. case IR::Opcode::StorageAtomicSMax32:
  684. case IR::Opcode::StorageAtomicUMax32:
  685. case IR::Opcode::StorageAtomicAnd32:
  686. case IR::Opcode::StorageAtomicOr32:
  687. case IR::Opcode::StorageAtomicXor32:
  688. case IR::Opcode::StorageAtomicExchange32:
  689. info.used_storage_buffer_types |= IR::Type::U32;
  690. break;
  691. case IR::Opcode::LoadStorage64:
  692. case IR::Opcode::WriteStorage64:
  693. info.used_storage_buffer_types |= IR::Type::U32x2;
  694. break;
  695. case IR::Opcode::LoadStorage128:
  696. case IR::Opcode::WriteStorage128:
  697. info.used_storage_buffer_types |= IR::Type::U32x4;
  698. break;
  699. case IR::Opcode::SharedAtomicInc32:
  700. info.uses_shared_increment = true;
  701. break;
  702. case IR::Opcode::SharedAtomicDec32:
  703. info.uses_shared_decrement = true;
  704. break;
  705. case IR::Opcode::SharedAtomicExchange64:
  706. info.uses_int64_bit_atomics = true;
  707. break;
  708. case IR::Opcode::GlobalAtomicInc32:
  709. case IR::Opcode::StorageAtomicInc32:
  710. info.used_storage_buffer_types |= IR::Type::U32;
  711. info.uses_global_increment = true;
  712. break;
  713. case IR::Opcode::GlobalAtomicDec32:
  714. case IR::Opcode::StorageAtomicDec32:
  715. info.used_storage_buffer_types |= IR::Type::U32;
  716. info.uses_global_decrement = true;
  717. break;
  718. case IR::Opcode::GlobalAtomicAddF32:
  719. case IR::Opcode::StorageAtomicAddF32:
  720. info.used_storage_buffer_types |= IR::Type::U32;
  721. info.uses_atomic_f32_add = true;
  722. break;
  723. case IR::Opcode::GlobalAtomicAddF16x2:
  724. case IR::Opcode::StorageAtomicAddF16x2:
  725. info.used_storage_buffer_types |= IR::Type::U32;
  726. info.uses_atomic_f16x2_add = true;
  727. break;
  728. case IR::Opcode::GlobalAtomicAddF32x2:
  729. case IR::Opcode::StorageAtomicAddF32x2:
  730. info.used_storage_buffer_types |= IR::Type::U32;
  731. info.uses_atomic_f32x2_add = true;
  732. break;
  733. case IR::Opcode::GlobalAtomicMinF16x2:
  734. case IR::Opcode::StorageAtomicMinF16x2:
  735. info.used_storage_buffer_types |= IR::Type::U32;
  736. info.uses_atomic_f16x2_min = true;
  737. break;
  738. case IR::Opcode::GlobalAtomicMinF32x2:
  739. case IR::Opcode::StorageAtomicMinF32x2:
  740. info.used_storage_buffer_types |= IR::Type::U32;
  741. info.uses_atomic_f32x2_min = true;
  742. break;
  743. case IR::Opcode::GlobalAtomicMaxF16x2:
  744. case IR::Opcode::StorageAtomicMaxF16x2:
  745. info.used_storage_buffer_types |= IR::Type::U32;
  746. info.uses_atomic_f16x2_max = true;
  747. break;
  748. case IR::Opcode::GlobalAtomicMaxF32x2:
  749. case IR::Opcode::StorageAtomicMaxF32x2:
  750. info.used_storage_buffer_types |= IR::Type::U32;
  751. info.uses_atomic_f32x2_max = true;
  752. break;
  753. case IR::Opcode::GlobalAtomicIAdd64:
  754. case IR::Opcode::GlobalAtomicSMin64:
  755. case IR::Opcode::GlobalAtomicUMin64:
  756. case IR::Opcode::GlobalAtomicSMax64:
  757. case IR::Opcode::GlobalAtomicUMax64:
  758. case IR::Opcode::GlobalAtomicAnd64:
  759. case IR::Opcode::GlobalAtomicOr64:
  760. case IR::Opcode::GlobalAtomicXor64:
  761. case IR::Opcode::GlobalAtomicExchange64:
  762. case IR::Opcode::StorageAtomicIAdd64:
  763. case IR::Opcode::StorageAtomicSMin64:
  764. case IR::Opcode::StorageAtomicUMin64:
  765. case IR::Opcode::StorageAtomicSMax64:
  766. case IR::Opcode::StorageAtomicUMax64:
  767. case IR::Opcode::StorageAtomicAnd64:
  768. case IR::Opcode::StorageAtomicOr64:
  769. case IR::Opcode::StorageAtomicXor64:
  770. info.used_storage_buffer_types |= IR::Type::U64;
  771. info.uses_int64_bit_atomics = true;
  772. break;
  773. case IR::Opcode::BindlessImageAtomicIAdd32:
  774. case IR::Opcode::BindlessImageAtomicSMin32:
  775. case IR::Opcode::BindlessImageAtomicUMin32:
  776. case IR::Opcode::BindlessImageAtomicSMax32:
  777. case IR::Opcode::BindlessImageAtomicUMax32:
  778. case IR::Opcode::BindlessImageAtomicInc32:
  779. case IR::Opcode::BindlessImageAtomicDec32:
  780. case IR::Opcode::BindlessImageAtomicAnd32:
  781. case IR::Opcode::BindlessImageAtomicOr32:
  782. case IR::Opcode::BindlessImageAtomicXor32:
  783. case IR::Opcode::BindlessImageAtomicExchange32:
  784. case IR::Opcode::BoundImageAtomicIAdd32:
  785. case IR::Opcode::BoundImageAtomicSMin32:
  786. case IR::Opcode::BoundImageAtomicUMin32:
  787. case IR::Opcode::BoundImageAtomicSMax32:
  788. case IR::Opcode::BoundImageAtomicUMax32:
  789. case IR::Opcode::BoundImageAtomicInc32:
  790. case IR::Opcode::BoundImageAtomicDec32:
  791. case IR::Opcode::BoundImageAtomicAnd32:
  792. case IR::Opcode::BoundImageAtomicOr32:
  793. case IR::Opcode::BoundImageAtomicXor32:
  794. case IR::Opcode::BoundImageAtomicExchange32:
  795. case IR::Opcode::ImageAtomicIAdd32:
  796. case IR::Opcode::ImageAtomicSMin32:
  797. case IR::Opcode::ImageAtomicUMin32:
  798. case IR::Opcode::ImageAtomicSMax32:
  799. case IR::Opcode::ImageAtomicUMax32:
  800. case IR::Opcode::ImageAtomicInc32:
  801. case IR::Opcode::ImageAtomicDec32:
  802. case IR::Opcode::ImageAtomicAnd32:
  803. case IR::Opcode::ImageAtomicOr32:
  804. case IR::Opcode::ImageAtomicXor32:
  805. case IR::Opcode::ImageAtomicExchange32:
  806. info.uses_atomic_image_u32 = true;
  807. break;
  808. default:
  809. break;
  810. }
  811. }
  812. void VisitFpModifiers(Info& info, IR::Inst& inst) {
  813. switch (inst.GetOpcode()) {
  814. case IR::Opcode::FPAdd16:
  815. case IR::Opcode::FPFma16:
  816. case IR::Opcode::FPMul16:
  817. case IR::Opcode::FPRoundEven16:
  818. case IR::Opcode::FPFloor16:
  819. case IR::Opcode::FPCeil16:
  820. case IR::Opcode::FPTrunc16: {
  821. const auto control{inst.Flags<IR::FpControl>()};
  822. switch (control.fmz_mode) {
  823. case IR::FmzMode::DontCare:
  824. break;
  825. case IR::FmzMode::FTZ:
  826. case IR::FmzMode::FMZ:
  827. info.uses_fp16_denorms_flush = true;
  828. break;
  829. case IR::FmzMode::None:
  830. info.uses_fp16_denorms_preserve = true;
  831. break;
  832. }
  833. break;
  834. }
  835. case IR::Opcode::FPAdd32:
  836. case IR::Opcode::FPFma32:
  837. case IR::Opcode::FPMul32:
  838. case IR::Opcode::FPRoundEven32:
  839. case IR::Opcode::FPFloor32:
  840. case IR::Opcode::FPCeil32:
  841. case IR::Opcode::FPTrunc32:
  842. case IR::Opcode::FPOrdEqual32:
  843. case IR::Opcode::FPUnordEqual32:
  844. case IR::Opcode::FPOrdNotEqual32:
  845. case IR::Opcode::FPUnordNotEqual32:
  846. case IR::Opcode::FPOrdLessThan32:
  847. case IR::Opcode::FPUnordLessThan32:
  848. case IR::Opcode::FPOrdGreaterThan32:
  849. case IR::Opcode::FPUnordGreaterThan32:
  850. case IR::Opcode::FPOrdLessThanEqual32:
  851. case IR::Opcode::FPUnordLessThanEqual32:
  852. case IR::Opcode::FPOrdGreaterThanEqual32:
  853. case IR::Opcode::FPUnordGreaterThanEqual32:
  854. case IR::Opcode::ConvertF16F32:
  855. case IR::Opcode::ConvertF64F32: {
  856. const auto control{inst.Flags<IR::FpControl>()};
  857. switch (control.fmz_mode) {
  858. case IR::FmzMode::DontCare:
  859. break;
  860. case IR::FmzMode::FTZ:
  861. case IR::FmzMode::FMZ:
  862. info.uses_fp32_denorms_flush = true;
  863. break;
  864. case IR::FmzMode::None:
  865. info.uses_fp32_denorms_preserve = true;
  866. break;
  867. }
  868. break;
  869. }
  870. default:
  871. break;
  872. }
  873. }
  874. void VisitCbufs(Info& info, IR::Inst& inst) {
  875. switch (inst.GetOpcode()) {
  876. case IR::Opcode::GetCbufU8:
  877. case IR::Opcode::GetCbufS8:
  878. case IR::Opcode::GetCbufU16:
  879. case IR::Opcode::GetCbufS16:
  880. case IR::Opcode::GetCbufU32:
  881. case IR::Opcode::GetCbufF32:
  882. case IR::Opcode::GetCbufU32x2: {
  883. CheckCBufNVN(info, inst);
  884. break;
  885. }
  886. default:
  887. break;
  888. }
  889. }
  890. void Visit(Info& info, IR::Inst& inst) {
  891. VisitUsages(info, inst);
  892. VisitFpModifiers(info, inst);
  893. VisitCbufs(info, inst);
  894. }
  895. void GatherInfoFromHeader(Environment& env, Info& info) {
  896. Stage stage{env.ShaderStage()};
  897. if (stage == Stage::Compute) {
  898. return;
  899. }
  900. const auto& header{env.SPH()};
  901. if (stage == Stage::Fragment) {
  902. if (!info.loads_indexed_attributes) {
  903. return;
  904. }
  905. for (size_t i = 0; i < info.input_generics.size(); i++) {
  906. info.input_generics[i].used |= header.ps.IsGenericVectorActive(i);
  907. }
  908. info.loads_position |= header.ps.imap_systemb.position != 0;
  909. return;
  910. }
  911. if (info.loads_indexed_attributes) {
  912. for (size_t i = 0; i < info.input_generics.size(); i++) {
  913. info.input_generics[i].used |= header.vtg.IsInputGenericVectorActive(i);
  914. }
  915. info.loads_position |= header.vtg.imap_systemb.position != 0;
  916. }
  917. if (info.stores_indexed_attributes) {
  918. for (size_t i = 0; i < info.stores_generics.size(); i++) {
  919. info.stores_generics[i] |= header.vtg.IsOutputGenericVectorActive(i);
  920. }
  921. info.stores_clip_distance |= header.vtg.omap_systemc.clip_distances != 0;
  922. info.stores_position |= header.vtg.omap_systemb.position != 0;
  923. }
  924. }
  925. } // Anonymous namespace
  926. void CollectShaderInfoPass(Environment& env, IR::Program& program) {
  927. Info& info{program.info};
  928. const u32 base{[&] {
  929. switch (program.stage) {
  930. case Stage::VertexA:
  931. case Stage::VertexB:
  932. return 0x110u;
  933. case Stage::TessellationControl:
  934. return 0x210u;
  935. case Stage::TessellationEval:
  936. return 0x310u;
  937. case Stage::Geometry:
  938. return 0x410u;
  939. case Stage::Fragment:
  940. return 0x510u;
  941. case Stage::Compute:
  942. return 0x310u;
  943. }
  944. throw InvalidArgument("Invalid stage {}", program.stage);
  945. }()};
  946. info.nvn_buffer_base = base;
  947. for (IR::Block* const block : program.post_order_blocks) {
  948. for (IR::Inst& inst : block->Instructions()) {
  949. Visit(info, inst);
  950. }
  951. }
  952. GatherInfoFromHeader(env, info);
  953. }
  954. } // namespace Shader::Optimization