shader_interpreter.cpp 27 KB

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  1. // Copyright 2014 Citra Emulator Project
  2. // Licensed under GPLv2 or any later version
  3. // Refer to the license.txt file included.
  4. #include <common/file_util.h>
  5. #include <nihstro/shader_bytecode.h>
  6. #include "video_core/pica.h"
  7. #include "shader.h"
  8. #include "shader_interpreter.h"
  9. using nihstro::OpCode;
  10. using nihstro::Instruction;
  11. using nihstro::RegisterType;
  12. using nihstro::SourceRegister;
  13. using nihstro::SwizzlePattern;
  14. namespace Pica {
  15. namespace Shader {
  16. template<bool Debug>
  17. void RunInterpreter(UnitState<Debug>& state) {
  18. const auto& uniforms = g_state.vs.uniforms;
  19. const auto& swizzle_data = g_state.vs.swizzle_data;
  20. const auto& program_code = g_state.vs.program_code;
  21. // Placeholder for invalid inputs
  22. static float24 dummy_vec4_float24[4];
  23. unsigned iteration = 0;
  24. bool exit_loop = false;
  25. while (!exit_loop) {
  26. if (!state.call_stack.empty()) {
  27. auto& top = state.call_stack.back();
  28. if (state.program_counter == top.final_address) {
  29. state.address_registers[2] += top.loop_increment;
  30. if (top.repeat_counter-- == 0) {
  31. state.program_counter = top.return_address;
  32. state.call_stack.pop_back();
  33. } else {
  34. state.program_counter = top.loop_address;
  35. }
  36. // TODO: Is "trying again" accurate to hardware?
  37. continue;
  38. }
  39. }
  40. const Instruction instr = { program_code[state.program_counter] };
  41. const SwizzlePattern swizzle = { swizzle_data[instr.common.operand_desc_id] };
  42. static auto call = [](UnitState<Debug>& state, u32 offset, u32 num_instructions,
  43. u32 return_offset, u8 repeat_count, u8 loop_increment) {
  44. state.program_counter = offset - 1; // -1 to make sure when incrementing the PC we end up at the correct offset
  45. ASSERT(state.call_stack.size() < state.call_stack.capacity());
  46. state.call_stack.push_back({ offset + num_instructions, return_offset, repeat_count, loop_increment, offset });
  47. };
  48. Record<DebugDataRecord::CUR_INSTR>(state.debug, iteration, state.program_counter);
  49. if (iteration > 0)
  50. Record<DebugDataRecord::NEXT_INSTR>(state.debug, iteration - 1, state.program_counter);
  51. state.debug.max_offset = std::max<u32>(state.debug.max_offset, 1 + state.program_counter);
  52. auto LookupSourceRegister = [&](const SourceRegister& source_reg) -> const float24* {
  53. switch (source_reg.GetRegisterType()) {
  54. case RegisterType::Input:
  55. return &state.registers.input[source_reg.GetIndex()].x;
  56. case RegisterType::Temporary:
  57. return &state.registers.temporary[source_reg.GetIndex()].x;
  58. case RegisterType::FloatUniform:
  59. return &uniforms.f[source_reg.GetIndex()].x;
  60. default:
  61. return dummy_vec4_float24;
  62. }
  63. };
  64. switch (instr.opcode.Value().GetInfo().type) {
  65. case OpCode::Type::Arithmetic:
  66. {
  67. const bool is_inverted = (0 != (instr.opcode.Value().GetInfo().subtype & OpCode::Info::SrcInversed));
  68. const int address_offset = (instr.common.address_register_index == 0)
  69. ? 0 : state.address_registers[instr.common.address_register_index - 1];
  70. const float24* src1_ = LookupSourceRegister(instr.common.GetSrc1(is_inverted) + (!is_inverted * address_offset));
  71. const float24* src2_ = LookupSourceRegister(instr.common.GetSrc2(is_inverted) + ( is_inverted * address_offset));
  72. const bool negate_src1 = ((bool)swizzle.negate_src1 != false);
  73. const bool negate_src2 = ((bool)swizzle.negate_src2 != false);
  74. float24 src1[4] = {
  75. src1_[(int)swizzle.GetSelectorSrc1(0)],
  76. src1_[(int)swizzle.GetSelectorSrc1(1)],
  77. src1_[(int)swizzle.GetSelectorSrc1(2)],
  78. src1_[(int)swizzle.GetSelectorSrc1(3)],
  79. };
  80. if (negate_src1) {
  81. src1[0] = src1[0] * float24::FromFloat32(-1);
  82. src1[1] = src1[1] * float24::FromFloat32(-1);
  83. src1[2] = src1[2] * float24::FromFloat32(-1);
  84. src1[3] = src1[3] * float24::FromFloat32(-1);
  85. }
  86. float24 src2[4] = {
  87. src2_[(int)swizzle.GetSelectorSrc2(0)],
  88. src2_[(int)swizzle.GetSelectorSrc2(1)],
  89. src2_[(int)swizzle.GetSelectorSrc2(2)],
  90. src2_[(int)swizzle.GetSelectorSrc2(3)],
  91. };
  92. if (negate_src2) {
  93. src2[0] = src2[0] * float24::FromFloat32(-1);
  94. src2[1] = src2[1] * float24::FromFloat32(-1);
  95. src2[2] = src2[2] * float24::FromFloat32(-1);
  96. src2[3] = src2[3] * float24::FromFloat32(-1);
  97. }
  98. float24* dest = (instr.common.dest.Value() < 0x10) ? &state.registers.output[instr.common.dest.Value().GetIndex()][0]
  99. : (instr.common.dest.Value() < 0x20) ? &state.registers.temporary[instr.common.dest.Value().GetIndex()][0]
  100. : dummy_vec4_float24;
  101. state.debug.max_opdesc_id = std::max<u32>(state.debug.max_opdesc_id, 1+instr.common.operand_desc_id);
  102. switch (instr.opcode.Value().EffectiveOpCode()) {
  103. case OpCode::Id::ADD:
  104. {
  105. Record<DebugDataRecord::SRC1>(state.debug, iteration, src1);
  106. Record<DebugDataRecord::SRC2>(state.debug, iteration, src2);
  107. Record<DebugDataRecord::DEST_IN>(state.debug, iteration, dest);
  108. for (int i = 0; i < 4; ++i) {
  109. if (!swizzle.DestComponentEnabled(i))
  110. continue;
  111. dest[i] = src1[i] + src2[i];
  112. }
  113. Record<DebugDataRecord::DEST_OUT>(state.debug, iteration, dest);
  114. break;
  115. }
  116. case OpCode::Id::MUL:
  117. {
  118. Record<DebugDataRecord::SRC1>(state.debug, iteration, src1);
  119. Record<DebugDataRecord::SRC2>(state.debug, iteration, src2);
  120. Record<DebugDataRecord::DEST_IN>(state.debug, iteration, dest);
  121. for (int i = 0; i < 4; ++i) {
  122. if (!swizzle.DestComponentEnabled(i))
  123. continue;
  124. dest[i] = src1[i] * src2[i];
  125. }
  126. Record<DebugDataRecord::DEST_OUT>(state.debug, iteration, dest);
  127. break;
  128. }
  129. case OpCode::Id::FLR:
  130. Record<DebugDataRecord::SRC1>(state.debug, iteration, src1);
  131. Record<DebugDataRecord::DEST_IN>(state.debug, iteration, dest);
  132. for (int i = 0; i < 4; ++i) {
  133. if (!swizzle.DestComponentEnabled(i))
  134. continue;
  135. dest[i] = float24::FromFloat32(std::floor(src1[i].ToFloat32()));
  136. }
  137. Record<DebugDataRecord::DEST_OUT>(state.debug, iteration, dest);
  138. break;
  139. case OpCode::Id::MAX:
  140. Record<DebugDataRecord::SRC1>(state.debug, iteration, src1);
  141. Record<DebugDataRecord::SRC2>(state.debug, iteration, src2);
  142. Record<DebugDataRecord::DEST_IN>(state.debug, iteration, dest);
  143. for (int i = 0; i < 4; ++i) {
  144. if (!swizzle.DestComponentEnabled(i))
  145. continue;
  146. dest[i] = std::max(src1[i], src2[i]);
  147. }
  148. Record<DebugDataRecord::DEST_OUT>(state.debug, iteration, dest);
  149. break;
  150. case OpCode::Id::MIN:
  151. Record<DebugDataRecord::SRC1>(state.debug, iteration, src1);
  152. Record<DebugDataRecord::SRC2>(state.debug, iteration, src2);
  153. Record<DebugDataRecord::DEST_IN>(state.debug, iteration, dest);
  154. for (int i = 0; i < 4; ++i) {
  155. if (!swizzle.DestComponentEnabled(i))
  156. continue;
  157. dest[i] = std::min(src1[i], src2[i]);
  158. }
  159. Record<DebugDataRecord::DEST_OUT>(state.debug, iteration, dest);
  160. break;
  161. case OpCode::Id::DP3:
  162. case OpCode::Id::DP4:
  163. case OpCode::Id::DPH:
  164. case OpCode::Id::DPHI:
  165. {
  166. Record<DebugDataRecord::SRC1>(state.debug, iteration, src1);
  167. Record<DebugDataRecord::SRC2>(state.debug, iteration, src2);
  168. Record<DebugDataRecord::DEST_IN>(state.debug, iteration, dest);
  169. OpCode::Id opcode = instr.opcode.Value().EffectiveOpCode();
  170. if (opcode == OpCode::Id::DPH || opcode == OpCode::Id::DPHI)
  171. src1[3] = float24::FromFloat32(1.0f);
  172. float24 dot = float24::FromFloat32(0.f);
  173. int num_components = (opcode == OpCode::Id::DP3) ? 3 : 4;
  174. for (int i = 0; i < num_components; ++i)
  175. dot = dot + src1[i] * src2[i];
  176. for (int i = 0; i < 4; ++i) {
  177. if (!swizzle.DestComponentEnabled(i))
  178. continue;
  179. dest[i] = dot;
  180. }
  181. Record<DebugDataRecord::DEST_OUT>(state.debug, iteration, dest);
  182. break;
  183. }
  184. // Reciprocal
  185. case OpCode::Id::RCP:
  186. {
  187. Record<DebugDataRecord::SRC1>(state.debug, iteration, src1);
  188. Record<DebugDataRecord::DEST_IN>(state.debug, iteration, dest);
  189. for (int i = 0; i < 4; ++i) {
  190. if (!swizzle.DestComponentEnabled(i))
  191. continue;
  192. // TODO: Be stable against division by zero!
  193. // TODO: I think this might be wrong... we should only use one component here
  194. dest[i] = float24::FromFloat32(1.0f / src1[i].ToFloat32());
  195. }
  196. Record<DebugDataRecord::DEST_OUT>(state.debug, iteration, dest);
  197. break;
  198. }
  199. // Reciprocal Square Root
  200. case OpCode::Id::RSQ:
  201. {
  202. Record<DebugDataRecord::SRC1>(state.debug, iteration, src1);
  203. Record<DebugDataRecord::DEST_IN>(state.debug, iteration, dest);
  204. for (int i = 0; i < 4; ++i) {
  205. if (!swizzle.DestComponentEnabled(i))
  206. continue;
  207. // TODO: Be stable against division by zero!
  208. // TODO: I think this might be wrong... we should only use one component here
  209. dest[i] = float24::FromFloat32(1.0f / sqrt(src1[i].ToFloat32()));
  210. }
  211. Record<DebugDataRecord::DEST_OUT>(state.debug, iteration, dest);
  212. break;
  213. }
  214. case OpCode::Id::MOVA:
  215. {
  216. Record<DebugDataRecord::SRC1>(state.debug, iteration, src1);
  217. for (int i = 0; i < 2; ++i) {
  218. if (!swizzle.DestComponentEnabled(i))
  219. continue;
  220. // TODO: Figure out how the rounding is done on hardware
  221. state.address_registers[i] = static_cast<s32>(src1[i].ToFloat32());
  222. }
  223. Record<DebugDataRecord::ADDR_REG_OUT>(state.debug, iteration, state.address_registers);
  224. break;
  225. }
  226. case OpCode::Id::MOV:
  227. {
  228. Record<DebugDataRecord::SRC1>(state.debug, iteration, src1);
  229. Record<DebugDataRecord::DEST_IN>(state.debug, iteration, dest);
  230. for (int i = 0; i < 4; ++i) {
  231. if (!swizzle.DestComponentEnabled(i))
  232. continue;
  233. dest[i] = src1[i];
  234. }
  235. Record<DebugDataRecord::DEST_OUT>(state.debug, iteration, dest);
  236. break;
  237. }
  238. case OpCode::Id::SGE:
  239. case OpCode::Id::SGEI:
  240. Record<DebugDataRecord::SRC1>(state.debug, iteration, src1);
  241. Record<DebugDataRecord::SRC2>(state.debug, iteration, src2);
  242. Record<DebugDataRecord::DEST_IN>(state.debug, iteration, dest);
  243. for (int i = 0; i < 4; ++i) {
  244. if (!swizzle.DestComponentEnabled(i))
  245. continue;
  246. dest[i] = (src1[i] >= src2[i]) ? float24::FromFloat32(1.0f) : float24::FromFloat32(0.0f);
  247. }
  248. Record<DebugDataRecord::DEST_OUT>(state.debug, iteration, dest);
  249. break;
  250. case OpCode::Id::SLT:
  251. case OpCode::Id::SLTI:
  252. Record<DebugDataRecord::SRC1>(state.debug, iteration, src1);
  253. Record<DebugDataRecord::SRC2>(state.debug, iteration, src2);
  254. Record<DebugDataRecord::DEST_IN>(state.debug, iteration, dest);
  255. for (int i = 0; i < 4; ++i) {
  256. if (!swizzle.DestComponentEnabled(i))
  257. continue;
  258. dest[i] = (src1[i] < src2[i]) ? float24::FromFloat32(1.0f) : float24::FromFloat32(0.0f);
  259. }
  260. Record<DebugDataRecord::DEST_OUT>(state.debug, iteration, dest);
  261. break;
  262. case OpCode::Id::CMP:
  263. Record<DebugDataRecord::SRC1>(state.debug, iteration, src1);
  264. Record<DebugDataRecord::SRC2>(state.debug, iteration, src2);
  265. for (int i = 0; i < 2; ++i) {
  266. // TODO: Can you restrict to one compare via dest masking?
  267. auto compare_op = instr.common.compare_op;
  268. auto op = (i == 0) ? compare_op.x.Value() : compare_op.y.Value();
  269. switch (op) {
  270. case Instruction::Common::CompareOpType::Equal:
  271. state.conditional_code[i] = (src1[i] == src2[i]);
  272. break;
  273. case Instruction::Common::CompareOpType::NotEqual:
  274. state.conditional_code[i] = (src1[i] != src2[i]);
  275. break;
  276. case Instruction::Common::CompareOpType::LessThan:
  277. state.conditional_code[i] = (src1[i] < src2[i]);
  278. break;
  279. case Instruction::Common::CompareOpType::LessEqual:
  280. state.conditional_code[i] = (src1[i] <= src2[i]);
  281. break;
  282. case Instruction::Common::CompareOpType::GreaterThan:
  283. state.conditional_code[i] = (src1[i] > src2[i]);
  284. break;
  285. case Instruction::Common::CompareOpType::GreaterEqual:
  286. state.conditional_code[i] = (src1[i] >= src2[i]);
  287. break;
  288. default:
  289. LOG_ERROR(HW_GPU, "Unknown compare mode %x", static_cast<int>(op));
  290. break;
  291. }
  292. }
  293. Record<DebugDataRecord::CMP_RESULT>(state.debug, iteration, state.conditional_code);
  294. break;
  295. case OpCode::Id::EX2:
  296. {
  297. Record<DebugDataRecord::SRC1>(state.debug, iteration, src1);
  298. Record<DebugDataRecord::DEST_IN>(state.debug, iteration, dest);
  299. // EX2 only takes first component exp2 and writes it to all dest components
  300. float24 ex2_res = float24::FromFloat32(std::exp2(src1[0].ToFloat32()));
  301. for (int i = 0; i < 4; ++i) {
  302. if (!swizzle.DestComponentEnabled(i))
  303. continue;
  304. dest[i] = ex2_res;
  305. }
  306. Record<DebugDataRecord::DEST_OUT>(state.debug, iteration, dest);
  307. break;
  308. }
  309. case OpCode::Id::LG2:
  310. {
  311. Record<DebugDataRecord::SRC1>(state.debug, iteration, src1);
  312. Record<DebugDataRecord::DEST_IN>(state.debug, iteration, dest);
  313. // LG2 only takes the first component log2 and writes it to all dest components
  314. float24 lg2_res = float24::FromFloat32(std::log2(src1[0].ToFloat32()));
  315. for (int i = 0; i < 4; ++i) {
  316. if (!swizzle.DestComponentEnabled(i))
  317. continue;
  318. dest[i] = lg2_res;
  319. }
  320. Record<DebugDataRecord::DEST_OUT>(state.debug, iteration, dest);
  321. break;
  322. }
  323. default:
  324. LOG_ERROR(HW_GPU, "Unhandled arithmetic instruction: 0x%02x (%s): 0x%08x",
  325. (int)instr.opcode.Value().EffectiveOpCode(), instr.opcode.Value().GetInfo().name, instr.hex);
  326. DEBUG_ASSERT(false);
  327. break;
  328. }
  329. break;
  330. }
  331. case OpCode::Type::MultiplyAdd:
  332. {
  333. if ((instr.opcode.Value().EffectiveOpCode() == OpCode::Id::MAD) ||
  334. (instr.opcode.Value().EffectiveOpCode() == OpCode::Id::MADI)) {
  335. const SwizzlePattern& swizzle = *(SwizzlePattern*)&swizzle_data[instr.mad.operand_desc_id];
  336. bool is_inverted = (instr.opcode.Value().EffectiveOpCode() == OpCode::Id::MADI);
  337. const float24* src1_ = LookupSourceRegister(instr.mad.GetSrc1(is_inverted));
  338. const float24* src2_ = LookupSourceRegister(instr.mad.GetSrc2(is_inverted));
  339. const float24* src3_ = LookupSourceRegister(instr.mad.GetSrc3(is_inverted));
  340. const bool negate_src1 = ((bool)swizzle.negate_src1 != false);
  341. const bool negate_src2 = ((bool)swizzle.negate_src2 != false);
  342. const bool negate_src3 = ((bool)swizzle.negate_src3 != false);
  343. float24 src1[4] = {
  344. src1_[(int)swizzle.GetSelectorSrc1(0)],
  345. src1_[(int)swizzle.GetSelectorSrc1(1)],
  346. src1_[(int)swizzle.GetSelectorSrc1(2)],
  347. src1_[(int)swizzle.GetSelectorSrc1(3)],
  348. };
  349. if (negate_src1) {
  350. src1[0] = src1[0] * float24::FromFloat32(-1);
  351. src1[1] = src1[1] * float24::FromFloat32(-1);
  352. src1[2] = src1[2] * float24::FromFloat32(-1);
  353. src1[3] = src1[3] * float24::FromFloat32(-1);
  354. }
  355. float24 src2[4] = {
  356. src2_[(int)swizzle.GetSelectorSrc2(0)],
  357. src2_[(int)swizzle.GetSelectorSrc2(1)],
  358. src2_[(int)swizzle.GetSelectorSrc2(2)],
  359. src2_[(int)swizzle.GetSelectorSrc2(3)],
  360. };
  361. if (negate_src2) {
  362. src2[0] = src2[0] * float24::FromFloat32(-1);
  363. src2[1] = src2[1] * float24::FromFloat32(-1);
  364. src2[2] = src2[2] * float24::FromFloat32(-1);
  365. src2[3] = src2[3] * float24::FromFloat32(-1);
  366. }
  367. float24 src3[4] = {
  368. src3_[(int)swizzle.GetSelectorSrc3(0)],
  369. src3_[(int)swizzle.GetSelectorSrc3(1)],
  370. src3_[(int)swizzle.GetSelectorSrc3(2)],
  371. src3_[(int)swizzle.GetSelectorSrc3(3)],
  372. };
  373. if (negate_src3) {
  374. src3[0] = src3[0] * float24::FromFloat32(-1);
  375. src3[1] = src3[1] * float24::FromFloat32(-1);
  376. src3[2] = src3[2] * float24::FromFloat32(-1);
  377. src3[3] = src3[3] * float24::FromFloat32(-1);
  378. }
  379. float24* dest = (instr.mad.dest.Value() < 0x10) ? &state.registers.output[instr.mad.dest.Value().GetIndex()][0]
  380. : (instr.mad.dest.Value() < 0x20) ? &state.registers.temporary[instr.mad.dest.Value().GetIndex()][0]
  381. : dummy_vec4_float24;
  382. Record<DebugDataRecord::SRC1>(state.debug, iteration, src1);
  383. Record<DebugDataRecord::SRC2>(state.debug, iteration, src2);
  384. Record<DebugDataRecord::SRC3>(state.debug, iteration, src3);
  385. Record<DebugDataRecord::DEST_IN>(state.debug, iteration, dest);
  386. for (int i = 0; i < 4; ++i) {
  387. if (!swizzle.DestComponentEnabled(i))
  388. continue;
  389. dest[i] = src1[i] * src2[i] + src3[i];
  390. }
  391. Record<DebugDataRecord::DEST_OUT>(state.debug, iteration, dest);
  392. } else {
  393. LOG_ERROR(HW_GPU, "Unhandled multiply-add instruction: 0x%02x (%s): 0x%08x",
  394. (int)instr.opcode.Value().EffectiveOpCode(), instr.opcode.Value().GetInfo().name, instr.hex);
  395. }
  396. break;
  397. }
  398. default:
  399. {
  400. static auto evaluate_condition = [](const UnitState<Debug>& state, bool refx, bool refy, Instruction::FlowControlType flow_control) {
  401. bool results[2] = { refx == state.conditional_code[0],
  402. refy == state.conditional_code[1] };
  403. switch (flow_control.op) {
  404. case flow_control.Or:
  405. return results[0] || results[1];
  406. case flow_control.And:
  407. return results[0] && results[1];
  408. case flow_control.JustX:
  409. return results[0];
  410. case flow_control.JustY:
  411. return results[1];
  412. }
  413. };
  414. // Handle each instruction on its own
  415. switch (instr.opcode.Value()) {
  416. case OpCode::Id::END:
  417. exit_loop = true;
  418. break;
  419. case OpCode::Id::JMPC:
  420. Record<DebugDataRecord::COND_CMP_IN>(state.debug, iteration, state.conditional_code);
  421. if (evaluate_condition(state, instr.flow_control.refx, instr.flow_control.refy, instr.flow_control)) {
  422. state.program_counter = instr.flow_control.dest_offset - 1;
  423. }
  424. break;
  425. case OpCode::Id::JMPU:
  426. Record<DebugDataRecord::COND_BOOL_IN>(state.debug, iteration, uniforms.b[instr.flow_control.bool_uniform_id]);
  427. if (uniforms.b[instr.flow_control.bool_uniform_id]) {
  428. state.program_counter = instr.flow_control.dest_offset - 1;
  429. }
  430. break;
  431. case OpCode::Id::CALL:
  432. call(state,
  433. instr.flow_control.dest_offset,
  434. instr.flow_control.num_instructions,
  435. state.program_counter + 1, 0, 0);
  436. break;
  437. case OpCode::Id::CALLU:
  438. Record<DebugDataRecord::COND_BOOL_IN>(state.debug, iteration, uniforms.b[instr.flow_control.bool_uniform_id]);
  439. if (uniforms.b[instr.flow_control.bool_uniform_id]) {
  440. call(state,
  441. instr.flow_control.dest_offset,
  442. instr.flow_control.num_instructions,
  443. state.program_counter + 1, 0, 0);
  444. }
  445. break;
  446. case OpCode::Id::CALLC:
  447. Record<DebugDataRecord::COND_CMP_IN>(state.debug, iteration, state.conditional_code);
  448. if (evaluate_condition(state, instr.flow_control.refx, instr.flow_control.refy, instr.flow_control)) {
  449. call(state,
  450. instr.flow_control.dest_offset,
  451. instr.flow_control.num_instructions,
  452. state.program_counter + 1, 0, 0);
  453. }
  454. break;
  455. case OpCode::Id::NOP:
  456. break;
  457. case OpCode::Id::IFU:
  458. Record<DebugDataRecord::COND_BOOL_IN>(state.debug, iteration, uniforms.b[instr.flow_control.bool_uniform_id]);
  459. if (uniforms.b[instr.flow_control.bool_uniform_id]) {
  460. call(state,
  461. state.program_counter + 1,
  462. instr.flow_control.dest_offset - state.program_counter - 1,
  463. instr.flow_control.dest_offset + instr.flow_control.num_instructions, 0, 0);
  464. } else {
  465. call(state,
  466. instr.flow_control.dest_offset,
  467. instr.flow_control.num_instructions,
  468. instr.flow_control.dest_offset + instr.flow_control.num_instructions, 0, 0);
  469. }
  470. break;
  471. case OpCode::Id::IFC:
  472. {
  473. // TODO: Do we need to consider swizzlers here?
  474. Record<DebugDataRecord::COND_CMP_IN>(state.debug, iteration, state.conditional_code);
  475. if (evaluate_condition(state, instr.flow_control.refx, instr.flow_control.refy, instr.flow_control)) {
  476. call(state,
  477. state.program_counter + 1,
  478. instr.flow_control.dest_offset - state.program_counter - 1,
  479. instr.flow_control.dest_offset + instr.flow_control.num_instructions, 0, 0);
  480. } else {
  481. call(state,
  482. instr.flow_control.dest_offset,
  483. instr.flow_control.num_instructions,
  484. instr.flow_control.dest_offset + instr.flow_control.num_instructions, 0, 0);
  485. }
  486. break;
  487. }
  488. case OpCode::Id::LOOP:
  489. {
  490. Math::Vec4<u8> loop_param(uniforms.i[instr.flow_control.int_uniform_id].x,
  491. uniforms.i[instr.flow_control.int_uniform_id].y,
  492. uniforms.i[instr.flow_control.int_uniform_id].z,
  493. uniforms.i[instr.flow_control.int_uniform_id].w);
  494. state.address_registers[2] = loop_param.y;
  495. Record<DebugDataRecord::LOOP_INT_IN>(state.debug, iteration, loop_param);
  496. call(state,
  497. state.program_counter + 1,
  498. instr.flow_control.dest_offset - state.program_counter + 1,
  499. instr.flow_control.dest_offset + 1,
  500. loop_param.x,
  501. loop_param.z);
  502. break;
  503. }
  504. default:
  505. LOG_ERROR(HW_GPU, "Unhandled instruction: 0x%02x (%s): 0x%08x",
  506. (int)instr.opcode.Value().EffectiveOpCode(), instr.opcode.Value().GetInfo().name, instr.hex);
  507. break;
  508. }
  509. break;
  510. }
  511. }
  512. ++state.program_counter;
  513. ++iteration;
  514. }
  515. }
  516. // Explicit instantiation
  517. template void RunInterpreter(UnitState<false>& state);
  518. template void RunInterpreter(UnitState<true>& state);
  519. } // namespace
  520. } // namespace