memory.h 5.0 KB

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  1. // Copyright 2014 Citra Emulator Project
  2. // Licensed under GPLv2 or any later version
  3. // Refer to the license.txt file included.
  4. #pragma once
  5. #include <cstddef>
  6. #include "common/common_types.h"
  7. namespace Memory {
  8. /**
  9. * Page size used by the ARM architecture. This is the smallest granularity with which memory can
  10. * be mapped.
  11. */
  12. const u32 PAGE_SIZE = 0x1000;
  13. const u32 PAGE_MASK = PAGE_SIZE - 1;
  14. const int PAGE_BITS = 12;
  15. /// Physical memory regions as seen from the ARM11
  16. enum : PAddr {
  17. /// IO register area
  18. IO_AREA_PADDR = 0x10100000,
  19. IO_AREA_SIZE = 0x01000000, ///< IO area size (16MB)
  20. IO_AREA_PADDR_END = IO_AREA_PADDR + IO_AREA_SIZE,
  21. /// MPCore internal memory region
  22. MPCORE_RAM_PADDR = 0x17E00000,
  23. MPCORE_RAM_SIZE = 0x00002000, ///< MPCore internal memory size (8KB)
  24. MPCORE_RAM_PADDR_END = MPCORE_RAM_PADDR + MPCORE_RAM_SIZE,
  25. /// Video memory
  26. VRAM_PADDR = 0x18000000,
  27. VRAM_SIZE = 0x00600000, ///< VRAM size (6MB)
  28. VRAM_PADDR_END = VRAM_PADDR + VRAM_SIZE,
  29. /// DSP memory
  30. DSP_RAM_PADDR = 0x1FF00000,
  31. DSP_RAM_SIZE = 0x00080000, ///< DSP memory size (512KB)
  32. DSP_RAM_PADDR_END = DSP_RAM_PADDR + DSP_RAM_SIZE,
  33. /// AXI WRAM
  34. AXI_WRAM_PADDR = 0x1FF80000,
  35. AXI_WRAM_SIZE = 0x00080000, ///< AXI WRAM size (512KB)
  36. AXI_WRAM_PADDR_END = AXI_WRAM_PADDR + AXI_WRAM_SIZE,
  37. /// Main FCRAM
  38. FCRAM_PADDR = 0x20000000,
  39. FCRAM_SIZE = 0x08000000, ///< FCRAM size (128MB)
  40. FCRAM_PADDR_END = FCRAM_PADDR + FCRAM_SIZE,
  41. };
  42. /// Virtual user-space memory regions
  43. enum : VAddr {
  44. /// Where the application text, data and bss reside.
  45. PROCESS_IMAGE_VADDR = 0x00100000,
  46. PROCESS_IMAGE_MAX_SIZE = 0x03F00000,
  47. PROCESS_IMAGE_VADDR_END = PROCESS_IMAGE_VADDR + PROCESS_IMAGE_MAX_SIZE,
  48. /// Area where IPC buffers are mapped onto.
  49. IPC_MAPPING_VADDR = 0x04000000,
  50. IPC_MAPPING_SIZE = 0x04000000,
  51. IPC_MAPPING_VADDR_END = IPC_MAPPING_VADDR + IPC_MAPPING_SIZE,
  52. /// Application heap (includes stack).
  53. HEAP_VADDR = 0x08000000,
  54. HEAP_SIZE = 0x08000000,
  55. HEAP_VADDR_END = HEAP_VADDR + HEAP_SIZE,
  56. /// Area where shared memory buffers are mapped onto.
  57. SHARED_MEMORY_VADDR = 0x10000000,
  58. SHARED_MEMORY_SIZE = 0x04000000,
  59. SHARED_MEMORY_VADDR_END = SHARED_MEMORY_VADDR + SHARED_MEMORY_SIZE,
  60. /// Maps 1:1 to an offset in FCRAM. Used for HW allocations that need to be linear in physical memory.
  61. LINEAR_HEAP_VADDR = 0x14000000,
  62. LINEAR_HEAP_SIZE = 0x08000000,
  63. LINEAR_HEAP_VADDR_END = LINEAR_HEAP_VADDR + LINEAR_HEAP_SIZE,
  64. /// Maps 1:1 to the IO register area.
  65. IO_AREA_VADDR = 0x1EC00000,
  66. IO_AREA_VADDR_END = IO_AREA_VADDR + IO_AREA_SIZE,
  67. /// Maps 1:1 to VRAM.
  68. VRAM_VADDR = 0x1F000000,
  69. VRAM_VADDR_END = VRAM_VADDR + VRAM_SIZE,
  70. /// Maps 1:1 to DSP memory.
  71. DSP_RAM_VADDR = 0x1FF00000,
  72. DSP_RAM_VADDR_END = DSP_RAM_VADDR + DSP_RAM_SIZE,
  73. /// Read-only page containing kernel and system configuration values.
  74. CONFIG_MEMORY_VADDR = 0x1FF80000,
  75. CONFIG_MEMORY_SIZE = 0x00001000,
  76. CONFIG_MEMORY_VADDR_END = CONFIG_MEMORY_VADDR + CONFIG_MEMORY_SIZE,
  77. /// Usually read-only page containing mostly values read from hardware.
  78. SHARED_PAGE_VADDR = 0x1FF81000,
  79. SHARED_PAGE_SIZE = 0x00001000,
  80. SHARED_PAGE_VADDR_END = SHARED_PAGE_VADDR + SHARED_PAGE_SIZE,
  81. // TODO(yuriks): The size of this area is dynamic, the kernel grows
  82. // it as more and more threads are created. For now we'll just use a
  83. // hardcoded value.
  84. /// Area where TLS (Thread-Local Storage) buffers are allocated.
  85. TLS_AREA_VADDR = 0x1FF82000,
  86. TLS_ENTRY_SIZE = 0x200,
  87. TLS_AREA_SIZE = 300 * TLS_ENTRY_SIZE + 0x800, // Space for up to 300 threads + round to page size
  88. TLS_AREA_VADDR_END = TLS_AREA_VADDR + TLS_AREA_SIZE,
  89. /// Equivalent to LINEAR_HEAP_VADDR, but expanded to cover the extra memory in the New 3DS.
  90. NEW_LINEAR_HEAP_VADDR = 0x30000000,
  91. NEW_LINEAR_HEAP_SIZE = 0x10000000,
  92. NEW_LINEAR_HEAP_VADDR_END = NEW_LINEAR_HEAP_VADDR + NEW_LINEAR_HEAP_SIZE,
  93. };
  94. u8 Read8(VAddr addr);
  95. u16 Read16(VAddr addr);
  96. u32 Read32(VAddr addr);
  97. u64 Read64(VAddr addr);
  98. void Write8(VAddr addr, u8 data);
  99. void Write16(VAddr addr, u16 data);
  100. void Write32(VAddr addr, u32 data);
  101. void Write64(VAddr addr, u64 data);
  102. void WriteBlock(VAddr addr, const u8* data, size_t size);
  103. u8* GetPointer(VAddr virtual_address);
  104. /**
  105. * Converts a virtual address inside a region with 1:1 mapping to physical memory to a physical
  106. * address. This should be used by services to translate addresses for use by the hardware.
  107. */
  108. PAddr VirtualToPhysicalAddress(VAddr addr);
  109. /**
  110. * Undoes a mapping performed by VirtualToPhysicalAddress().
  111. */
  112. VAddr PhysicalToVirtualAddress(PAddr addr);
  113. /**
  114. * Gets a pointer to the memory region beginning at the specified physical address.
  115. *
  116. * @note This is currently implemented using PhysicalToVirtualAddress().
  117. */
  118. u8* GetPhysicalPointer(PAddr address);
  119. }