arm_interface.h 5.0 KB

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  1. // Copyright 2014 Citra Emulator Project
  2. // Licensed under GPLv2 or any later version
  3. // Refer to the license.txt file included.
  4. #pragma once
  5. #include <array>
  6. #include <vector>
  7. #include "common/common_types.h"
  8. namespace Common {
  9. struct PageTable;
  10. }
  11. namespace Kernel {
  12. enum class VMAPermission : u8;
  13. }
  14. namespace Core {
  15. class System;
  16. /// Generic ARMv8 CPU interface
  17. class ARM_Interface : NonCopyable {
  18. public:
  19. explicit ARM_Interface(System& system_) : system{system_} {}
  20. virtual ~ARM_Interface() = default;
  21. struct ThreadContext32 {
  22. std::array<u32, 16> cpu_registers;
  23. u32 cpsr;
  24. std::array<u8, 4> padding;
  25. std::array<u64, 32> fprs;
  26. u32 fpscr;
  27. u32 fpexc;
  28. u32 tpidr;
  29. };
  30. // Internally within the kernel, it expects the AArch32 version of the
  31. // thread context to be 344 bytes in size.
  32. static_assert(sizeof(ThreadContext32) == 0x158);
  33. struct ThreadContext64 {
  34. std::array<u64, 31> cpu_registers;
  35. u64 sp;
  36. u64 pc;
  37. u32 pstate;
  38. std::array<u8, 4> padding;
  39. std::array<u128, 32> vector_registers;
  40. u32 fpcr;
  41. u32 fpsr;
  42. u64 tpidr;
  43. };
  44. // Internally within the kernel, it expects the AArch64 version of the
  45. // thread context to be 800 bytes in size.
  46. static_assert(sizeof(ThreadContext64) == 0x320);
  47. /// Runs the CPU until an event happens
  48. virtual void Run() = 0;
  49. /// Step CPU by one instruction
  50. virtual void Step() = 0;
  51. /// Clear all instruction cache
  52. virtual void ClearInstructionCache() = 0;
  53. /// Notifies CPU emulation that the current page table has changed.
  54. ///
  55. /// @param new_page_table The new page table.
  56. /// @param new_address_space_size_in_bits The new usable size of the address space in bits.
  57. /// This can be either 32, 36, or 39 on official software.
  58. ///
  59. virtual void PageTableChanged(Common::PageTable& new_page_table,
  60. std::size_t new_address_space_size_in_bits) = 0;
  61. /**
  62. * Set the Program Counter to an address
  63. * @param addr Address to set PC to
  64. */
  65. virtual void SetPC(u64 addr) = 0;
  66. /*
  67. * Get the current Program Counter
  68. * @return Returns current PC
  69. */
  70. virtual u64 GetPC() const = 0;
  71. /**
  72. * Get an ARM register
  73. * @param index Register index
  74. * @return Returns the value in the register
  75. */
  76. virtual u64 GetReg(int index) const = 0;
  77. /**
  78. * Set an ARM register
  79. * @param index Register index
  80. * @param value Value to set register to
  81. */
  82. virtual void SetReg(int index, u64 value) = 0;
  83. /**
  84. * Gets the value of a specified vector register.
  85. *
  86. * @param index The index of the vector register.
  87. * @return the value within the vector register.
  88. */
  89. virtual u128 GetVectorReg(int index) const = 0;
  90. /**
  91. * Sets a given value into a vector register.
  92. *
  93. * @param index The index of the vector register.
  94. * @param value The new value to place in the register.
  95. */
  96. virtual void SetVectorReg(int index, u128 value) = 0;
  97. /**
  98. * Get the current PSTATE register
  99. * @return Returns the value of the PSTATE register
  100. */
  101. virtual u32 GetPSTATE() const = 0;
  102. /**
  103. * Set the current PSTATE register
  104. * @param pstate Value to set PSTATE to
  105. */
  106. virtual void SetPSTATE(u32 pstate) = 0;
  107. virtual VAddr GetTlsAddress() const = 0;
  108. virtual void SetTlsAddress(VAddr address) = 0;
  109. /**
  110. * Gets the value within the TPIDR_EL0 (read/write software thread ID) register.
  111. *
  112. * @return the value within the register.
  113. */
  114. virtual u64 GetTPIDR_EL0() const = 0;
  115. /**
  116. * Sets a new value within the TPIDR_EL0 (read/write software thread ID) register.
  117. *
  118. * @param value The new value to place in the register.
  119. */
  120. virtual void SetTPIDR_EL0(u64 value) = 0;
  121. virtual void SaveContext(ThreadContext32& ctx) = 0;
  122. virtual void SaveContext(ThreadContext64& ctx) = 0;
  123. virtual void LoadContext(const ThreadContext32& ctx) = 0;
  124. virtual void LoadContext(const ThreadContext64& ctx) = 0;
  125. /// Clears the exclusive monitor's state.
  126. virtual void ClearExclusiveState() = 0;
  127. /// Prepare core for thread reschedule (if needed to correctly handle state)
  128. virtual void PrepareReschedule() = 0;
  129. struct BacktraceEntry {
  130. std::string module;
  131. u64 address;
  132. u64 original_address;
  133. u64 offset;
  134. std::string name;
  135. };
  136. std::vector<BacktraceEntry> GetBacktrace() const;
  137. /// fp (= r29) points to the last frame record.
  138. /// Note that this is the frame record for the *previous* frame, not the current one.
  139. /// Note we need to subtract 4 from our last read to get the proper address
  140. /// Frame records are two words long:
  141. /// fp+0 : pointer to previous frame record
  142. /// fp+8 : value of lr for frame
  143. void LogBacktrace() const;
  144. protected:
  145. /// System context that this ARM interface is running under.
  146. System& system;
  147. };
  148. } // namespace Core