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@@ -16,7 +16,34 @@ u32 ShaderIR::DecodeArithmeticHalfImmediate(BasicBlock& bb, u32 pc) {
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const Instruction instr = {program_code[pc]};
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const Instruction instr = {program_code[pc]};
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const auto opcode = OpCode::Decode(instr);
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const auto opcode = OpCode::Decode(instr);
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- UNIMPLEMENTED();
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+ if (opcode->get().GetId() == OpCode::Id::HADD2_IMM) {
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+ UNIMPLEMENTED_IF(instr.alu_half_imm.ftz != 0);
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+ } else {
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+ UNIMPLEMENTED_IF(instr.alu_half_imm.precision != Tegra::Shader::HalfPrecision::None);
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+ }
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+ UNIMPLEMENTED_IF_MSG(instr.alu_half_imm.saturate != 0,
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+ "Half float immediate saturation not implemented");
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+
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+ Node op_a = GetRegister(instr.gpr8);
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+ op_a = GetOperandAbsNegHalf(op_a, instr.alu_half_imm.abs_a, instr.alu_half_imm.negate_a);
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+
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+ const Node op_b = UnpackHalfImmediate(instr, true);
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+
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+ Node value = [&]() {
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+ MetaHalfArithmetic meta{true, {instr.alu_half_imm.type_a}};
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+ switch (opcode->get().GetId()) {
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+ case OpCode::Id::HADD2_IMM:
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+ return Operation(OperationCode::HAdd, meta, op_a, op_b);
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+ case OpCode::Id::HMUL2_IMM:
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+ return Operation(OperationCode::HMul, meta, op_a, op_b);
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+ default:
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+ UNREACHABLE();
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+ return Immediate(0);
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+ }
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+ }();
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+ value = HalfMerge(GetRegister(instr.gpr0), value, instr.alu_half_imm.merge);
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+
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+ SetRegister(bb, instr.gpr0, value);
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return pc;
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return pc;
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}
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}
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