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@@ -205,6 +205,16 @@ std::string_view FormatStorage(ImageFormat format) {
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}
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}
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throw InvalidArgument("Invalid image format {}", format);
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throw InvalidArgument("Invalid image format {}", format);
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}
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}
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+
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+template <typename T>
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+void ImageAtomic(EmitContext& ctx, IR::Inst& inst, const IR::Value& index, Register coord, T value,
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+ std::string_view op) {
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+ const auto info{inst.Flags<IR::TextureInstInfo>()};
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+ const std::string_view type{TextureType(info)};
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+ const std::string image{Image(ctx, info, index)};
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+ const Register ret{ctx.reg_alloc.Define(inst)};
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+ ctx.Add("ATOMIM.{} {},{},{},{},{};", op, ret, value, coord, image, type);
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+}
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} // Anonymous namespace
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} // Anonymous namespace
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void EmitImageSampleImplicitLod(EmitContext& ctx, IR::Inst& inst, const IR::Value& index,
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void EmitImageSampleImplicitLod(EmitContext& ctx, IR::Inst& inst, const IR::Value& index,
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@@ -590,6 +600,61 @@ void EmitImageWrite(EmitContext& ctx, IR::Inst& inst, const IR::Value& index, Re
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ctx.Add("STOREIM.{} {},{},{},{};", format, image, color, coord, type);
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ctx.Add("STOREIM.{} {},{},{},{};", format, image, color, coord, type);
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}
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}
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+void EmitImageAtomicIAdd32(EmitContext& ctx, IR::Inst& inst, const IR::Value& index, Register coord,
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+ ScalarU32 value) {
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+ ImageAtomic(ctx, inst, index, coord, value, "ADD.U32");
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+}
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+
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+void EmitImageAtomicSMin32(EmitContext& ctx, IR::Inst& inst, const IR::Value& index, Register coord,
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+ ScalarS32 value) {
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+ ImageAtomic(ctx, inst, index, coord, value, "MIN.S32");
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+}
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+
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+void EmitImageAtomicUMin32(EmitContext& ctx, IR::Inst& inst, const IR::Value& index, Register coord,
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+ ScalarU32 value) {
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+ ImageAtomic(ctx, inst, index, coord, value, "MIN.U32");
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+}
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+
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+void EmitImageAtomicSMax32(EmitContext& ctx, IR::Inst& inst, const IR::Value& index, Register coord,
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+ ScalarS32 value) {
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+ ImageAtomic(ctx, inst, index, coord, value, "MAX.S32");
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+}
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+
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+void EmitImageAtomicUMax32(EmitContext& ctx, IR::Inst& inst, const IR::Value& index, Register coord,
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+ ScalarU32 value) {
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+ ImageAtomic(ctx, inst, index, coord, value, "MAX.U32");
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+}
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+
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+void EmitImageAtomicInc32(EmitContext& ctx, IR::Inst& inst, const IR::Value& index, Register coord,
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+ ScalarU32 value) {
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+ ImageAtomic(ctx, inst, index, coord, value, "IWRAP.U32");
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+}
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+
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+void EmitImageAtomicDec32(EmitContext& ctx, IR::Inst& inst, const IR::Value& index, Register coord,
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+ ScalarU32 value) {
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+ ImageAtomic(ctx, inst, index, coord, value, "DWRAP.U32");
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+}
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+
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+void EmitImageAtomicAnd32(EmitContext& ctx, IR::Inst& inst, const IR::Value& index, Register coord,
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+ ScalarU32 value) {
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+ ImageAtomic(ctx, inst, index, coord, value, "AND.U32");
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+}
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+
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+void EmitImageAtomicOr32(EmitContext& ctx, IR::Inst& inst, const IR::Value& index, Register coord,
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+ ScalarU32 value) {
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+ ImageAtomic(ctx, inst, index, coord, value, "OR.U32");
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+}
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+
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+void EmitImageAtomicXor32(EmitContext& ctx, IR::Inst& inst, const IR::Value& index, Register coord,
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+ ScalarU32 value) {
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+ ImageAtomic(ctx, inst, index, coord, value, "XOR.U32");
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+}
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+
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+void EmitImageAtomicExchange32(EmitContext& ctx, IR::Inst& inst, const IR::Value& index,
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+ Register coord, ScalarU32 value) {
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+ ImageAtomic(ctx, inst, index, coord, value, "EXCH.U32");
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+}
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+
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void EmitBindlessImageSampleImplicitLod(EmitContext&) {
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void EmitBindlessImageSampleImplicitLod(EmitContext&) {
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throw LogicError("Unreachable instruction");
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throw LogicError("Unreachable instruction");
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}
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}
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@@ -686,4 +751,92 @@ void EmitBoundImageWrite(EmitContext&) {
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throw LogicError("Unreachable instruction");
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throw LogicError("Unreachable instruction");
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}
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}
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+void EmitBindlessImageAtomicIAdd32(EmitContext&) {
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+ throw LogicError("Unreachable instruction");
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+}
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+
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+void EmitBindlessImageAtomicSMin32(EmitContext&) {
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+ throw LogicError("Unreachable instruction");
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+}
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+
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+void EmitBindlessImageAtomicUMin32(EmitContext&) {
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+ throw LogicError("Unreachable instruction");
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+}
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+
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+void EmitBindlessImageAtomicSMax32(EmitContext&) {
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+ throw LogicError("Unreachable instruction");
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+}
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+
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+void EmitBindlessImageAtomicUMax32(EmitContext&) {
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+ throw LogicError("Unreachable instruction");
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+}
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+
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+void EmitBindlessImageAtomicInc32(EmitContext&) {
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+ throw LogicError("Unreachable instruction");
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+}
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+
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+void EmitBindlessImageAtomicDec32(EmitContext&) {
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+ throw LogicError("Unreachable instruction");
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+}
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+
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+void EmitBindlessImageAtomicAnd32(EmitContext&) {
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+ throw LogicError("Unreachable instruction");
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+}
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+
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+void EmitBindlessImageAtomicOr32(EmitContext&) {
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+ throw LogicError("Unreachable instruction");
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+}
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+
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+void EmitBindlessImageAtomicXor32(EmitContext&) {
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+ throw LogicError("Unreachable instruction");
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+}
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+
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+void EmitBindlessImageAtomicExchange32(EmitContext&) {
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+ throw LogicError("Unreachable instruction");
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+}
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+
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+void EmitBoundImageAtomicIAdd32(EmitContext&) {
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+ throw LogicError("Unreachable instruction");
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+}
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+
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+void EmitBoundImageAtomicSMin32(EmitContext&) {
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+ throw LogicError("Unreachable instruction");
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+}
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+
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+void EmitBoundImageAtomicUMin32(EmitContext&) {
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+ throw LogicError("Unreachable instruction");
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+}
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+
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+void EmitBoundImageAtomicSMax32(EmitContext&) {
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+ throw LogicError("Unreachable instruction");
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+}
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+
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+void EmitBoundImageAtomicUMax32(EmitContext&) {
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+ throw LogicError("Unreachable instruction");
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+}
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+
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+void EmitBoundImageAtomicInc32(EmitContext&) {
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+ throw LogicError("Unreachable instruction");
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+}
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+
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+void EmitBoundImageAtomicDec32(EmitContext&) {
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+ throw LogicError("Unreachable instruction");
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+}
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+
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+void EmitBoundImageAtomicAnd32(EmitContext&) {
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+ throw LogicError("Unreachable instruction");
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+}
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+
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+void EmitBoundImageAtomicOr32(EmitContext&) {
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+ throw LogicError("Unreachable instruction");
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+}
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+
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+void EmitBoundImageAtomicXor32(EmitContext&) {
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+ throw LogicError("Unreachable instruction");
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+}
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+
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+void EmitBoundImageAtomicExchange32(EmitContext&) {
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+ throw LogicError("Unreachable instruction");
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+}
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+
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} // namespace Shader::Backend::GLASM
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} // namespace Shader::Backend::GLASM
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