GPU: Added vertex attribute format registers.

src/video_core/engines/maxwell_3d.h

@@ -34,6 +34,7 @@ public:
         static constexpr size_t NumRenderTargets = 8;
         static constexpr size_t NumCBData = 16;
         static constexpr size_t NumVertexArrays = 32;
+        static constexpr size_t NumVertexAttributes = 32;
         static constexpr size_t MaxShaderProgram = 6;
         static constexpr size_t MaxShaderStage = 5;
         // Maximum number of const buffers per shader stage.
@@ -105,7 +106,18 @@ public:
                     }
                 } zeta;
 
-                INSERT_PADDING_WORDS(0x8A);
+                INSERT_PADDING_WORDS(0x5B);
+
+                union {
+                    BitField<0, 5, u32> buffer;
+                    BitField<6, 1, u32> constant;
+                    BitField<7, 14, u32> offset;
+                    BitField<21, 6, u32> size;
+                    BitField<27, 3, u32> type;
+                    BitField<31, 1, u32> bgra;
+                } vertex_attrib_format[NumVertexAttributes];
+
+                INSERT_PADDING_WORDS(0xF);
 
                 struct {
                     union {
@@ -348,6 +360,7 @@ private:
 ASSERT_REG_POSITION(rt, 0x200);
 ASSERT_REG_POSITION(vertex_buffer, 0x35D);
 ASSERT_REG_POSITION(zeta, 0x3F8);
+ASSERT_REG_POSITION(vertex_attrib_format[0], 0x458);
 ASSERT_REG_POSITION(rt_control, 0x487);
 ASSERT_REG_POSITION(tsc, 0x557);
 ASSERT_REG_POSITION(tic, 0x55D);