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@@ -6480,9 +6480,13 @@ L_stm_s_takeabort:
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// SMUSD and SMLSD
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// SMUSD and SMLSD
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else {
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else {
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state->Reg[rd_idx] = product1 - product2;
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state->Reg[rd_idx] = product1 - product2;
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-
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- if (BITS(12, 15) != 15)
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+
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+ if (BITS(12, 15) != 15) {
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state->Reg[rd_idx] += state->Reg[ra_idx];
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state->Reg[rd_idx] += state->Reg[ra_idx];
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+
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+ if (ARMul_AddOverflowQ(product1 - product2, state->Reg[ra_idx]))
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+ SETQ;
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+ }
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}
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}
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return 1;
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return 1;
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