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@@ -17,7 +17,7 @@ set(SRCS core.cpp
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arm/interpreter/thumbemu.cpp
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arm/interpreter/vfp/vfp.cpp
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arm/interpreter/vfp/vfpdouble.cpp
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- arm/interpreter/vfp/vfpinsr.cpp
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+ arm/interpreter/vfp/vfpinstr.cpp
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arm/interpreter/vfp/vfpsingle.cpp
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arm/interpreter/mmu/arm1176jzf_s_mmu.cpp
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arm/interpreter/mmu/cache.cpp
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