GPU: Added registers for the number of vertices to render.

src/video_core/engines/maxwell_3d.h

@@ -83,7 +83,14 @@ public:
                     }
                 } rt[NumRenderTargets];
 
-                INSERT_PADDING_WORDS(0x178);
+                INSERT_PADDING_WORDS(0xDD);
+
+                struct {
+                    u32 first;
+                    u32 count;
+                } vertex_buffer;
+
+                INSERT_PADDING_WORDS(0x99);
 
                 struct {
                     u32 address_high;
@@ -146,7 +153,10 @@ public:
                 INSERT_PADDING_WORDS(1);
                 struct {
                     u32 vertex_end_gl;
-                    u32 vertex_begin_gl;
+                    union {
+                        u32 vertex_begin_gl;
+                        BitField<0, 16, u32> topology;
+                    };
                 } draw;
                 INSERT_PADDING_WORDS(0x139);
                 struct {
@@ -336,6 +346,7 @@ private:
                   "Field " #field_name " has invalid position")
 
 ASSERT_REG_POSITION(rt, 0x200);
+ASSERT_REG_POSITION(vertex_buffer, 0x35D);
 ASSERT_REG_POSITION(zeta, 0x3F8);
 ASSERT_REG_POSITION(rt_control, 0x487);
 ASSERT_REG_POSITION(tsc, 0x557);