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@@ -33,17 +33,36 @@ u32 ShaderIR::DecodeBfe(NodeBlock& bb, u32 pc) {
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}();
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UNIMPLEMENTED_IF_MSG(instr.bfe.rd_cc, "Condition codes in BFE is not implemented");
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- UNIMPLEMENTED_IF_MSG(instr.bfe.brev, "BREV in BFE is not implemented");
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const bool is_signed = instr.bfe.is_signed;
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- const auto start_position = SignedOperation(OperationCode::IBitfieldExtract, is_signed, op_b,
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- Immediate(0), Immediate(8));
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+ if (instr.bfe.brev) {
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+ const auto swap = [&](u32 s, u32 mask) {
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+ Node v1 =
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+ SignedOperation(OperationCode::ILogicalShiftRight, is_signed, op_a, Immediate(s));
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+ if (mask != 0) {
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+ v1 = SignedOperation(OperationCode::IBitwiseAnd, is_signed, v1, Immediate(mask));
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+ }
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+ Node v2 = op_a;
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+ if (mask != 0) {
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+ v2 = SignedOperation(OperationCode::IBitwiseAnd, is_signed, op_a, Immediate(mask));
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+ }
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+ v2 = SignedOperation(OperationCode::ILogicalShiftLeft, is_signed, v2, Immediate(s));
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+ return SignedOperation(OperationCode::IBitwiseOr, is_signed, v1, v2);
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+ };
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+ op_a = swap(1, 0x55555555U);
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+ op_a = swap(2, 0x33333333U);
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+ op_a = swap(4, 0x0F0F0F0FU);
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+ op_a = swap(8, 0x00FF00FFU);
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+ op_a = swap(16, 0);
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+ }
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+
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+ const auto offset = SignedOperation(OperationCode::IBitfieldExtract, is_signed, op_b,
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+ Immediate(0), Immediate(8));
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const auto bits = SignedOperation(OperationCode::IBitfieldExtract, is_signed, op_b,
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Immediate(8), Immediate(8));
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-
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- auto result =
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- SignedOperation(OperationCode::IBitfieldExtract, is_signed, op_a, start_position, bits);
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+ const auto result =
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+ SignedOperation(OperationCode::IBitfieldExtract, is_signed, op_a, offset, bits);
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SetRegister(bb, instr.gpr0, result);
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return pc;
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