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@@ -0,0 +1,46 @@
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+// Copyright 2021 yuzu Emulator Project
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+// Licensed under GPLv2 or any later version
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+// Refer to the license.txt file included.
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+
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+#include "common/bit_field.h"
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+#include "common/common_types.h"
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+#include "shader_recompiler/frontend/maxwell/translate/impl/impl.h"
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+
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+namespace Shader::Maxwell {
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+namespace {
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+enum class Mode : u64 {
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+ Default,
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+ CovMask,
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+ Covered,
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+ Offset,
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+ CentroidOffset,
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+ MyIndex,
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+};
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+} // Anonymous namespace
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+
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+void TranslatorVisitor::PIXLD(u64 insn) {
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+ union {
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+ u64 raw;
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+ BitField<31, 3, Mode> mode;
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+ BitField<0, 8, IR::Reg> dest_reg;
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+ BitField<8, 8, IR::Reg> addr_reg;
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+ BitField<20, 8, s64> addr_offset;
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+ BitField<45, 3, IR::Pred> dest_pred;
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+ } const pixld{insn};
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+
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+ if (pixld.dest_pred != IR::Pred::PT) {
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+ throw NotImplementedException("Destination predicate");
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+ }
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+ if (pixld.addr_reg != IR::Reg::RZ || pixld.addr_offset != 0) {
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+ throw NotImplementedException("Non-zero source register");
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+ }
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+ switch (pixld.mode) {
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+ case Mode::MyIndex:
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+ X(pixld.dest_reg, ir.SampleId());
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+ break;
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+ default:
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+ throw NotImplementedException("Mode {}", pixld.mode.Value());
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+ }
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+}
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+
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+} // namespace Shader::Maxwell
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