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@@ -101,39 +101,43 @@ inline void Write(u32 addr, const T data) {
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const bool is_second_filler = (index != GPU_REG_INDEX(memory_fill_config[0].trigger));
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auto& config = g_regs.memory_fill_config[is_second_filler];
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- if (config.address_start && config.trigger) {
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- u8* start = Memory::GetPhysicalPointer(config.GetStartAddress());
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- u8* end = Memory::GetPhysicalPointer(config.GetEndAddress());
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-
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- if (config.fill_24bit) {
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- // fill with 24-bit values
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- for (u8* ptr = start; ptr < end; ptr += 3) {
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- ptr[0] = config.value_24bit_r;
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- ptr[1] = config.value_24bit_g;
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- ptr[2] = config.value_24bit_b;
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+ if (config.trigger) {
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+ if (config.address_start) { // Some games pass invalid values here
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+ u8* start = Memory::GetPhysicalPointer(config.GetStartAddress());
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+ u8* end = Memory::GetPhysicalPointer(config.GetEndAddress());
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+
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+ if (config.fill_24bit) {
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+ // fill with 24-bit values
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+ for (u8* ptr = start; ptr < end; ptr += 3) {
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+ ptr[0] = config.value_24bit_r;
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+ ptr[1] = config.value_24bit_g;
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+ ptr[2] = config.value_24bit_b;
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+ }
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+ } else if (config.fill_32bit) {
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+ // fill with 32-bit values
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+ for (u32* ptr = (u32*)start; ptr < (u32*)end; ++ptr)
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+ *ptr = config.value_32bit;
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+ } else {
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+ // fill with 16-bit values
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+ for (u16* ptr = (u16*)start; ptr < (u16*)end; ++ptr)
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+ *ptr = config.value_16bit;
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}
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- } else if (config.fill_32bit) {
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- // fill with 32-bit values
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- for (u32* ptr = (u32*)start; ptr < (u32*)end; ++ptr)
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- *ptr = config.value_32bit;
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- } else {
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- // fill with 16-bit values
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- for (u16* ptr = (u16*)start; ptr < (u16*)end; ++ptr)
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- *ptr = config.value_16bit;
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- }
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- LOG_TRACE(HW_GPU, "MemoryFill from 0x%08x to 0x%08x", config.GetStartAddress(), config.GetEndAddress());
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+ LOG_TRACE(HW_GPU, "MemoryFill from 0x%08x to 0x%08x", config.GetStartAddress(), config.GetEndAddress());
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- config.trigger = 0;
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- config.finished = 1;
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+ if (!is_second_filler) {
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+ GSP_GPU::SignalInterrupt(GSP_GPU::InterruptId::PSC0);
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+ } else {
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+ GSP_GPU::SignalInterrupt(GSP_GPU::InterruptId::PSC1);
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+ }
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- if (!is_second_filler) {
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- GSP_GPU::SignalInterrupt(GSP_GPU::InterruptId::PSC0);
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- } else {
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- GSP_GPU::SignalInterrupt(GSP_GPU::InterruptId::PSC1);
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+ VideoCore::g_renderer->hw_rasterizer->NotifyFlush(config.GetStartAddress(), config.GetEndAddress() - config.GetStartAddress());
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}
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- VideoCore::g_renderer->hw_rasterizer->NotifyFlush(config.GetStartAddress(), config.GetEndAddress() - config.GetStartAddress());
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+ // Reset "trigger" flag and set the "finish" flag
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+ // NOTE: This was confirmed to happen on hardware even if "address_start" is zero.
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+ config.trigger = 0;
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+ config.finished = 1;
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}
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break;
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}
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@@ -270,6 +274,7 @@ inline void Write(u32 addr, const T data) {
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config.GetPhysicalOutputAddress(), output_width, output_height,
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config.output_format.Value(), config.flags);
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+ g_regs.display_transfer_config.trigger = 0;
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GSP_GPU::SignalInterrupt(GSP_GPU::InterruptId::PPF);
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VideoCore::g_renderer->hw_rasterizer->NotifyFlush(config.GetPhysicalOutputAddress(), output_size);
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@@ -285,6 +290,8 @@ inline void Write(u32 addr, const T data) {
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{
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u32* buffer = (u32*)Memory::GetPhysicalPointer(config.GetPhysicalAddress());
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Pica::CommandProcessor::ProcessCommandList(buffer, config.size);
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+
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+ g_regs.command_processor_config.trigger = 0;
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}
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break;
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}
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