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@@ -6422,79 +6422,56 @@ L_stm_s_takeabort:
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return 1;
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}
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break;
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- case 0x6e: {
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- ARMword Rm;
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- int ror = -1;
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-
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- switch (BITS(4, 11)) {
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- case 0x07:
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- ror = 0;
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- break;
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- case 0x47:
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- ror = 8;
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- break;
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- case 0x87:
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- ror = 16;
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- break;
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- case 0xc7:
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- ror = 24;
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- break;
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-
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- case 0x01:
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- case 0xf3:
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- //ichfly
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- //USAT16
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- {
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- const u8 rd_idx = BITS(12, 15);
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- const u8 rn_idx = BITS(0, 3);
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- const u8 num_bits = BITS(16, 19);
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- const s16 max = 0xFFFF >> (16 - num_bits);
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- s16 rn_lo = (state->Reg[rn_idx]);
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- s16 rn_hi = (state->Reg[rn_idx] >> 16);
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-
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- if (max < rn_lo) {
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- rn_lo = max;
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- SETQ;
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- } else if (rn_lo < 0) {
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- rn_lo = 0;
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- SETQ;
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- }
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-
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- if (max < rn_hi) {
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- rn_hi = max;
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- SETQ;
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- } else if (rn_hi < 0) {
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- rn_hi = 0;
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- SETQ;
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- }
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+ case 0x6e: // USAT, USAT16, UXTB, and UXTAB
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+ {
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+ const u8 op2 = BITS(5, 7);
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- state->Reg[rd_idx] = (rn_lo & 0xFFFF) | ((rn_hi << 16) & 0xFFFF);
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- return 1;
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+ // USAT16
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+ if (op2 == 0x01) {
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+ const u8 rd_idx = BITS(12, 15);
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+ const u8 rn_idx = BITS(0, 3);
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+ const u8 num_bits = BITS(16, 19);
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+ const s16 max = 0xFFFF >> (16 - num_bits);
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+ s16 rn_lo = (state->Reg[rn_idx]);
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+ s16 rn_hi = (state->Reg[rn_idx] >> 16);
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+
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+ if (max < rn_lo) {
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+ rn_lo = max;
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+ SETQ;
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+ } else if (rn_lo < 0) {
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+ rn_lo = 0;
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+ SETQ;
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}
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-
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- default:
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- break;
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- }
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-
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- if (ror == -1) {
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- if (BITS(4, 6) == 0x7) {
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- printf("Unhandled v6 insn: usat\n");
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- return 0;
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+
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+ if (max < rn_hi) {
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+ rn_hi = max;
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+ SETQ;
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+ } else if (rn_hi < 0) {
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+ rn_hi = 0;
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+ SETQ;
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}
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- break;
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+
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+ state->Reg[rd_idx] = (rn_lo & 0xFFFF) | ((rn_hi << 16) & 0xFFFF);
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+ return 1;
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}
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-
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- Rm = ((state->Reg[BITS(0, 3)] >> ror) & 0xFF) | (((state->Reg[BITS(0, 3)] << (32 - ror)) & 0xFF) & 0xFF);
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-
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- if (BITS(16, 19) == 0xf)
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+ else if (op2 == 0x03) {
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+ const u8 rotate = BITS(10, 11) * 8;
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+ const u32 rm = ((state->Reg[BITS(0, 3)] >> rotate) & 0xFF) | (((state->Reg[BITS(0, 3)] << (32 - rotate)) & 0xFF) & 0xFF);
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+
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+ if (BITS(16, 19) == 0xf)
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/* UXTB */
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- state->Reg[BITS(12, 15)] = Rm;
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- else
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+ state->Reg[BITS(12, 15)] = rm;
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+ else
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/* UXTAB */
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- state->Reg[BITS(12, 15)] = state->Reg[BITS(16, 19)] + Rm;
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+ state->Reg[BITS(12, 15)] = state->Reg[BITS(16, 19)] + rm;
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- return 1;
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+ return 1;
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+ }
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+ else {
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+ printf("Unimplemented op: USAT");
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+ }
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}
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+ break;
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case 0x6f: // UXTH, UXTAH, and REVSH.
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{
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