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@@ -232,6 +232,22 @@ union Instruction {
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}
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} alu;
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+ union {
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+ BitField<39, 5, u64> shift_amount;
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+ BitField<20, 19, u64> immediate_low;
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+ BitField<56, 1, u64> immediate_high;
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+ BitField<48, 1, u64> negate_b;
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+ BitField<49, 1, u64> negate_a;
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+
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+ s32 GetImmediate() const {
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+ u32 immediate = static_cast<u32>(immediate_low | (immediate_high << 19));
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+ // Sign extend the 20-bit value.
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+ u32 mask = 1U << (20 - 1);
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+ return static_cast<s32>((immediate ^ mask) - mask);
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+ }
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+
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+ } iscadd;
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+
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union {
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BitField<48, 1, u64> negate_b;
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BitField<49, 1, u64> negate_c;
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@@ -362,6 +378,9 @@ public:
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FMUL_R,
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FMUL_IMM,
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FMUL32_IMM,
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+ ISCADD_C, // Scale and Add
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+ ISCADD_R,
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+ ISCADD_IMM,
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MUFU, // Multi-Function Operator
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RRO_C, // Range Reduction Operator
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RRO_R,
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@@ -405,6 +424,7 @@ public:
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Trivial,
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Arithmetic,
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Logic,
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+ ScaledAdd,
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Ffma,
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Flow,
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Memory,
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@@ -528,6 +548,9 @@ private:
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INST("0101110001101---", Id::FMUL_R, Type::Arithmetic, "FMUL_R"),
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INST("0011100-01101---", Id::FMUL_IMM, Type::Arithmetic, "FMUL_IMM"),
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INST("00011110--------", Id::FMUL32_IMM, Type::Arithmetic, "FMUL32_IMM"),
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+ INST("0100110000011---", Id::ISCADD_C, Type::ScaledAdd, "ISCADD_C"),
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+ INST("0101110000011---", Id::ISCADD_R, Type::ScaledAdd, "ISCADD_R"),
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+ INST("0011100-00011---", Id::ISCADD_IMM, Type::ScaledAdd, "ISCADD_IMM"),
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INST("0101000010000---", Id::MUFU, Type::Arithmetic, "MUFU"),
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INST("0100110010010---", Id::RRO_C, Type::Arithmetic, "RRO_C"),
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INST("0101110010010---", Id::RRO_R, Type::Arithmetic, "RRO_R"),
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