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@@ -16,7 +16,28 @@ u32 ShaderIR::DecodeBfi(BasicBlock& bb, u32 pc) {
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const Instruction instr = {program_code[pc]};
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const auto opcode = OpCode::Decode(instr);
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- UNIMPLEMENTED();
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+ UNIMPLEMENTED_IF(instr.generates_cc);
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+
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+ const auto [base, packed_shift] = [&]() -> std::tuple<Node, Node> {
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+ switch (opcode->get().GetId()) {
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+ case OpCode::Id::BFI_IMM_R:
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+ return {GetRegister(instr.gpr39), Immediate(instr.alu.GetSignedImm20_20())};
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+ default:
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+ UNREACHABLE();
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+ }
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+ }();
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+ const Node insert = GetRegister(instr.gpr8);
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+
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+ const Node offset =
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+ Operation(OperationCode::UBitwiseAnd, NO_PRECISE, packed_shift, Immediate(0xff));
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+
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+ Node bits =
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+ Operation(OperationCode::ULogicalShiftRight, NO_PRECISE, packed_shift, Immediate(8));
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+ bits = Operation(OperationCode::UBitwiseAnd, NO_PRECISE, bits, Immediate(0xff));
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+
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+ const Node value =
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+ Operation(OperationCode::UBitfieldInsert, PRECISE, base, insert, offset, bits);
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+ SetRegister(bb, instr.gpr0, value);
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return pc;
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}
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