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@@ -321,6 +321,24 @@ public:
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INSERT_PADDING_WORDS(1);
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};
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+ struct RenderTargetConfig {
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+ u32 address_high;
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+ u32 address_low;
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+ u32 width;
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+ u32 height;
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+ Tegra::RenderTargetFormat format;
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+ u32 block_dimensions;
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+ u32 array_mode;
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+ u32 layer_stride;
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+ u32 base_layer;
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+ INSERT_PADDING_WORDS(7);
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+
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+ GPUVAddr Address() const {
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+ return static_cast<GPUVAddr>((static_cast<GPUVAddr>(address_high) << 32) |
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+ address_low);
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+ }
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+ };
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+
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union {
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struct {
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INSERT_PADDING_WORDS(0x45);
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@@ -333,23 +351,7 @@ public:
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INSERT_PADDING_WORDS(0x1B8);
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- struct {
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- u32 address_high;
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- u32 address_low;
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- u32 width;
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- u32 height;
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- Tegra::RenderTargetFormat format;
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- u32 block_dimensions;
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- u32 array_mode;
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- u32 layer_stride;
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- u32 base_layer;
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- INSERT_PADDING_WORDS(7);
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-
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- GPUVAddr Address() const {
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- return static_cast<GPUVAddr>((static_cast<GPUVAddr>(address_high) << 32) |
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- address_low);
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- }
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- } rt[NumRenderTargets];
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+ RenderTargetConfig rt[NumRenderTargets];
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struct {
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f32 scale_x;
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