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@@ -235,6 +235,14 @@ private:
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const std::string& suffix;
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};
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+enum class InternalFlag : u64 {
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+ ZeroFlag = 0,
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+ CarryFlag = 1,
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+ OverflowFlag = 2,
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+ NaNFlag = 3,
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+ Amount
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+};
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+
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/**
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* Used to manage shader registers that are emulated with GLSL. This class keeps track of the state
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* of all registers (e.g. whether they are currently being used as Floats or Integers), and
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@@ -328,13 +336,19 @@ public:
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void SetRegisterToInteger(const Register& reg, bool is_signed, u64 elem,
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const std::string& value, u64 dest_num_components,
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u64 value_num_components, bool is_saturated = false,
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- u64 dest_elem = 0, Register::Size size = Register::Size::Word) {
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+ u64 dest_elem = 0, Register::Size size = Register::Size::Word,
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+ bool sets_cc = false) {
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ASSERT_MSG(!is_saturated, "Unimplemented");
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const std::string func{is_signed ? "intBitsToFloat" : "uintBitsToFloat"};
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SetRegister(reg, elem, func + '(' + ConvertIntegerSize(value, size) + ')',
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dest_num_components, value_num_components, dest_elem);
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+
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+ if (sets_cc) {
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+ const std::string zero_condition = "( " + ConvertIntegerSize(value, size) + " == 0 )";
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+ SetInternalFlag(InternalFlag::ZeroFlag, zero_condition);
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+ }
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}
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/**
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@@ -352,12 +366,23 @@ public:
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}
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std::string GetControlCode(const Tegra::Shader::ControlCode cc) const {
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- const u32 code = static_cast<u32>(cc);
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- return "controlCode_" + std::to_string(code) + suffix;
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+ switch (cc) {
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+ case Tegra::Shader::ControlCode::NEU:
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+ return "!(" + GetInternalFlag(InternalFlag::ZeroFlag) + ')';
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+ default:
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+ LOG_CRITICAL(HW_GPU, "Unimplemented Control Code {}", static_cast<u32>(cc));
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+ UNREACHABLE();
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+ return "false";
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+ }
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}
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- void SetControlCode(const Tegra::Shader::ControlCode cc, const std::string& value) const {
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- shader.AddLine(GetControlCode(cc) + " = " + value + ';');
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+ std::string GetInternalFlag(const InternalFlag ii) const {
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+ const u32 code = static_cast<u32>(ii);
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+ return "internalFlag_" + std::to_string(code) + suffix;
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+ }
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+
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+ void SetInternalFlag(const InternalFlag ii, const std::string& value) const {
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+ shader.AddLine(GetInternalFlag(ii) + " = " + value + ';');
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}
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/**
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@@ -423,9 +448,9 @@ public:
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}
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declarations.AddNewLine();
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- for (u32 cc = 0; cc < 32; cc++) {
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- const Tegra::Shader::ControlCode code = static_cast<Tegra::Shader::ControlCode>(cc);
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- declarations.AddLine("bool " + GetControlCode(code) + " = false;");
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+ for (u32 ii = 0; ii < static_cast<u64>(InternalFlag::Amount); ii++) {
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+ const InternalFlag code = static_cast<InternalFlag>(ii);
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+ declarations.AddLine("bool " + GetInternalFlag(code) + " = false;");
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}
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declarations.AddNewLine();
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@@ -1655,11 +1680,8 @@ private:
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}
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regs.SetRegisterToInteger(instr.gpr0, instr.conversion.is_output_signed, 0, op_a, 1,
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- 1, instr.alu.saturate_d, 0, instr.conversion.dest_size);
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- if (instr.generates_cc.Value() != 0) {
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- const std::string neucondition = "( " + op_a + " != 0 )";
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- regs.SetControlCode(Tegra::Shader::ControlCode::NEU, neucondition);
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- }
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+ 1, instr.alu.saturate_d, 0, instr.conversion.dest_size,
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+ instr.generates_cc.Value() != 0);
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break;
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}
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case OpCode::Id::I2F_R:
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