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@@ -15,6 +15,8 @@
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#include "core/hle/service/nvflinger/buffer_queue.h"
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#include "core/hle/service/nvflinger/buffer_queue.h"
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#include "video_core/cdma_pusher.h"
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#include "video_core/cdma_pusher.h"
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#include "video_core/dma_pusher.h"
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#include "video_core/dma_pusher.h"
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+#include "video_core/framebuffer_config.h"
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+#include "video_core/gpu_thread.h"
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using CacheAddr = std::uintptr_t;
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using CacheAddr = std::uintptr_t;
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[[nodiscard]] inline CacheAddr ToCacheAddr(const void* host_ptr) {
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[[nodiscard]] inline CacheAddr ToCacheAddr(const void* host_ptr) {
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@@ -101,28 +103,6 @@ enum class DepthFormat : u32 {
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struct CommandListHeader;
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struct CommandListHeader;
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class DebugContext;
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class DebugContext;
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-/**
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- * Struct describing framebuffer configuration
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- */
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-struct FramebufferConfig {
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- enum class PixelFormat : u32 {
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- A8B8G8R8_UNORM = 1,
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- RGB565_UNORM = 4,
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- B8G8R8A8_UNORM = 5,
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- };
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-
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- VAddr address;
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- u32 offset;
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- u32 width;
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- u32 height;
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- u32 stride;
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- PixelFormat pixel_format;
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-
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- using TransformFlags = Service::NVFlinger::BufferQueue::BufferTransformFlags;
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- TransformFlags transform_flags;
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- Common::Rectangle<int> crop_rect;
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-};
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-
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namespace Engines {
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namespace Engines {
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class Fermi2D;
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class Fermi2D;
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class Maxwell3D;
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class Maxwell3D;
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@@ -141,7 +121,7 @@ enum class EngineID {
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class MemoryManager;
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class MemoryManager;
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-class GPU {
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+class GPU final {
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public:
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public:
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struct MethodCall {
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struct MethodCall {
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u32 method{};
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u32 method{};
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@@ -159,7 +139,7 @@ public:
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};
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};
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explicit GPU(Core::System& system_, bool is_async_, bool use_nvdec_);
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explicit GPU(Core::System& system_, bool is_async_, bool use_nvdec_);
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- virtual ~GPU();
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+ ~GPU();
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/// Binds a renderer to the GPU.
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/// Binds a renderer to the GPU.
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void BindRenderer(std::unique_ptr<VideoCore::RendererBase> renderer);
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void BindRenderer(std::unique_ptr<VideoCore::RendererBase> renderer);
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@@ -176,7 +156,7 @@ public:
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/// Synchronizes CPU writes with Host GPU memory.
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/// Synchronizes CPU writes with Host GPU memory.
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void SyncGuestHost();
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void SyncGuestHost();
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/// Signal the ending of command list.
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/// Signal the ending of command list.
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- virtual void OnCommandListEnd();
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+ void OnCommandListEnd();
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/// Request a host GPU memory flush from the CPU.
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/// Request a host GPU memory flush from the CPU.
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[[nodiscard]] u64 RequestFlush(VAddr addr, std::size_t size);
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[[nodiscard]] u64 RequestFlush(VAddr addr, std::size_t size);
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@@ -240,7 +220,7 @@ public:
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}
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}
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// Waits for the GPU to finish working
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// Waits for the GPU to finish working
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- virtual void WaitIdle() const = 0;
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+ void WaitIdle() const;
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/// Allows the CPU/NvFlinger to wait on the GPU before presenting a frame.
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/// Allows the CPU/NvFlinger to wait on the GPU before presenting a frame.
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void WaitFence(u32 syncpoint_id, u32 value);
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void WaitFence(u32 syncpoint_id, u32 value);
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@@ -330,34 +310,34 @@ public:
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/// Performs any additional setup necessary in order to begin GPU emulation.
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/// Performs any additional setup necessary in order to begin GPU emulation.
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/// This can be used to launch any necessary threads and register any necessary
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/// This can be used to launch any necessary threads and register any necessary
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/// core timing events.
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/// core timing events.
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- virtual void Start() = 0;
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+ void Start();
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/// Obtain the CPU Context
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/// Obtain the CPU Context
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- virtual void ObtainContext() = 0;
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+ void ObtainContext();
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/// Release the CPU Context
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/// Release the CPU Context
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- virtual void ReleaseContext() = 0;
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+ void ReleaseContext();
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/// Push GPU command entries to be processed
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/// Push GPU command entries to be processed
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- virtual void PushGPUEntries(Tegra::CommandList&& entries) = 0;
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+ void PushGPUEntries(Tegra::CommandList&& entries);
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/// Push GPU command buffer entries to be processed
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/// Push GPU command buffer entries to be processed
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- virtual void PushCommandBuffer(Tegra::ChCommandHeaderList& entries) = 0;
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+ void PushCommandBuffer(Tegra::ChCommandHeaderList& entries);
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/// Swap buffers (render frame)
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/// Swap buffers (render frame)
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- virtual void SwapBuffers(const Tegra::FramebufferConfig* framebuffer) = 0;
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+ void SwapBuffers(const Tegra::FramebufferConfig* framebuffer);
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/// Notify rasterizer that any caches of the specified region should be flushed to Switch memory
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/// Notify rasterizer that any caches of the specified region should be flushed to Switch memory
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- virtual void FlushRegion(VAddr addr, u64 size) = 0;
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+ void FlushRegion(VAddr addr, u64 size);
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/// Notify rasterizer that any caches of the specified region should be invalidated
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/// Notify rasterizer that any caches of the specified region should be invalidated
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- virtual void InvalidateRegion(VAddr addr, u64 size) = 0;
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+ void InvalidateRegion(VAddr addr, u64 size);
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/// Notify rasterizer that any caches of the specified region should be flushed and invalidated
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/// Notify rasterizer that any caches of the specified region should be flushed and invalidated
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- virtual void FlushAndInvalidateRegion(VAddr addr, u64 size) = 0;
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+ void FlushAndInvalidateRegion(VAddr addr, u64 size);
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protected:
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protected:
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- virtual void TriggerCpuInterrupt(u32 syncpoint_id, u32 value) const = 0;
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+ void TriggerCpuInterrupt(u32 syncpoint_id, u32 value) const;
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private:
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private:
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void ProcessBindMethod(const MethodCall& method_call);
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void ProcessBindMethod(const MethodCall& method_call);
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@@ -426,6 +406,9 @@ private:
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u64 last_flush_fence{};
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u64 last_flush_fence{};
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std::mutex flush_request_mutex;
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std::mutex flush_request_mutex;
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+ VideoCommon::GPUThread::ThreadManager gpu_thread;
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+ std::unique_ptr<Core::Frontend::GraphicsContext> cpu_context;
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+
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const bool is_async;
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const bool is_async;
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};
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};
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